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authorSascha Hauer <s.hauer@pengutronix.de>2024-04-05 10:38:36 +0300
committerHeiko Stuebner <heiko@sntech.de>2024-04-10 08:08:50 +0300
commit575bc7b477e3f6c505f49c3d99d7be965594d640 (patch)
treecbb16a6326d951ded9e0a4976aee929da7b9a5a5 /include/dt-bindings
parent4cece764965020c22cff7665b18a012006359095 (diff)
downloadlinux-575bc7b477e3f6c505f49c3d99d7be965594d640.tar.xz
dt-bindings: clock: rockchip: add USB480M_PHY mux
The USB480M clock can source from a MUX that selects the clock to come from either of the USB-phy internal 480MHz PLLs. These clocks are provided by the USB phy driver. This adds the define for it. Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20240405-clk-rk3568-usb480m-phy-mux-v1-1-6c89de20a6ff@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/rk3568-cru.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/rk3568-cru.h b/include/dt-bindings/clock/rk3568-cru.h
index d29890865150..5263085c5b23 100644
--- a/include/dt-bindings/clock/rk3568-cru.h
+++ b/include/dt-bindings/clock/rk3568-cru.h
@@ -78,6 +78,7 @@
#define CPLL_333M 9
#define ARMCLK 10
#define USB480M 11
+#define USB480M_PHY 12
#define ACLK_CORE_NIU2BUS 18
#define CLK_CORE_PVTM 19
#define CLK_CORE_PVTM_CORE 20