diff options
| author | Mukunda, Vijendar <Vijendar.Mukunda@amd.com> | 2018-05-08 07:47:48 +0300 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2018-05-21 18:18:45 +0300 |
| commit | 18e8a40dd387856e7f7a067dcfecbe644afe6944 (patch) | |
| tree | 3af6a9c3b1579ea4b8f9c64818e8baf49f05b560 /sound/soc/amd/acp.h | |
| parent | e188c525b9e193bc5aec97c824bc0cd1a9cb6aeb (diff) | |
| download | linux-18e8a40dd387856e7f7a067dcfecbe644afe6944.tar.xz | |
ASoC: amd: sram bank update changes
Added sram bank variable to audio_substream_data structure.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/amd/acp.h')
| -rw-r--r-- | sound/soc/amd/acp.h | 20 |
1 files changed, 14 insertions, 6 deletions
diff --git a/sound/soc/amd/acp.h b/sound/soc/amd/acp.h index 2f48d1d25243..62695ede997d 100644 --- a/sound/soc/amd/acp.h +++ b/sound/soc/amd/acp.h @@ -19,12 +19,19 @@ #define ACP_PHYSICAL_BASE 0x14000 -/* Playback SRAM address (as a destination in dma descriptor) */ -#define ACP_SHARED_RAM_BANK_1_ADDRESS 0x4002000 - -/* Capture SRAM address (as a source in dma descriptor) */ -#define ACP_SHARED_RAM_BANK_5_ADDRESS 0x400A000 -#define ACP_SHARED_RAM_BANK_3_ADDRESS 0x4006000 +/* + * In case of I2S SP controller instance, Stoney uses SRAM bank 1 for + * playback and SRAM Bank 2 for capture where as in case of BT I2S + * Instance, Stoney uses SRAM Bank 3 for playback & SRAM Bank 4 will + * be used for capture. Carrizo uses I2S SP controller instance. SRAM Banks + * 1, 2, 3, 4 will be used for playback & SRAM Banks 5, 6, 7, 8 will be used + * for capture scenario. + */ +#define ACP_SRAM_BANK_1_ADDRESS 0x4002000 +#define ACP_SRAM_BANK_2_ADDRESS 0x4004000 +#define ACP_SRAM_BANK_3_ADDRESS 0x4006000 +#define ACP_SRAM_BANK_4_ADDRESS 0x4008000 +#define ACP_SRAM_BANK_5_ADDRESS 0x400A000 #define ACP_DMA_RESET_TIME 10000 #define ACP_CLOCK_EN_TIME_OUT_VALUE 0x000000FF @@ -95,6 +102,7 @@ struct audio_substream_data { u16 dma_dscr_idx_1; u16 dma_dscr_idx_2; u32 pte_offset; + u32 sram_bank; u32 byte_cnt_high_reg_offset; u32 byte_cnt_low_reg_offset; uint64_t size; |