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authorKuninori Morimoto <kuninori.morimoto.gx@renesas.com>2020-06-16 08:20:53 +0300
committerMark Brown <broonie@kernel.org>2020-06-22 17:13:43 +0300
commit1227f601ba34773b43969f46773430788df9e6a9 (patch)
treeb150126fadea752e87a764723de6d83c8def3ccb /sound/soc/codecs/max98088.c
parente348cf543426762d7babea49712534f95d0779b9 (diff)
downloadlinux-1227f601ba34773b43969f46773430788df9e6a9.tar.xz
ASoC: codecs: max*: rename to snd_soc_component_read()
We need to use snd_soc_component_read() instead of snd_soc_component_read32() This patch renames _read32() to _read() Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> Link: https://lore.kernel.org/r/87imfr4mdl.wl-kuninori.morimoto.gx@renesas.com Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/codecs/max98088.c')
-rw-r--r--sound/soc/codecs/max98088.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/sound/soc/codecs/max98088.c b/sound/soc/codecs/max98088.c
index f031d2caa8b7..1f1817634a41 100644
--- a/sound/soc/codecs/max98088.c
+++ b/sound/soc/codecs/max98088.c
@@ -996,7 +996,7 @@ static int max98088_dai1_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
- if (snd_soc_component_read32(component, M98088_REG_14_DAI1_FORMAT)
+ if (snd_soc_component_read(component, M98088_REG_14_DAI1_FORMAT)
& M98088_DAI_MAS) {
if (max98088->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
@@ -1063,7 +1063,7 @@ static int max98088_dai2_hw_params(struct snd_pcm_substream *substream,
cdata->rate = rate;
/* Configure NI when operating as master */
- if (snd_soc_component_read32(component, M98088_REG_1C_DAI2_FORMAT)
+ if (snd_soc_component_read(component, M98088_REG_1C_DAI2_FORMAT)
& M98088_DAI_MAS) {
if (max98088->sysclk == 0) {
dev_err(component->dev, "Invalid system clock frequency\n");
@@ -1120,7 +1120,7 @@ static int max98088_dai_set_sysclk(struct snd_soc_dai *dai,
return -EINVAL;
}
- if (snd_soc_component_read32(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) {
+ if (snd_soc_component_read(component, M98088_REG_51_PWR_SYS) & M98088_SHDNRUN) {
snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS,
M98088_SHDNRUN, 0);
snd_soc_component_update_bits(component, M98088_REG_51_PWR_SYS,
@@ -1440,7 +1440,7 @@ static void max98088_setup_eq1(struct snd_soc_component *component)
pdata->eq_cfg[best].rate, fs);
/* Disable EQ while configuring, and save current on/off state */
- save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL);
+ save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL);
snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ1EN, 0);
coef_set = &pdata->eq_cfg[sel];
@@ -1487,7 +1487,7 @@ static void max98088_setup_eq2(struct snd_soc_component *component)
pdata->eq_cfg[best].rate, fs);
/* Disable EQ while configuring, and save current on/off state */
- save = snd_soc_component_read32(component, M98088_REG_49_CFG_LEVEL);
+ save = snd_soc_component_read(component, M98088_REG_49_CFG_LEVEL);
snd_soc_component_update_bits(component, M98088_REG_49_CFG_LEVEL, M98088_EQ2EN, 0);
coef_set = &pdata->eq_cfg[sel];
@@ -1673,7 +1673,7 @@ static int max98088_probe(struct snd_soc_component *component)
max98088->mic1pre = 0;
max98088->mic2pre = 0;
- ret = snd_soc_component_read32(component, M98088_REG_FF_REV_ID);
+ ret = snd_soc_component_read(component, M98088_REG_FF_REV_ID);
if (ret < 0) {
dev_err(component->dev, "Failed to read device revision: %d\n",
ret);