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authorPierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>2017-01-31 23:16:52 +0300
committerTakashi Iwai <tiwai@suse.de>2017-02-01 18:22:24 +0300
commit964ca8083c0239b5a729ed08c9f50b6c31ab3a93 (patch)
tree03cec32622f5e64e8f3edb52d04bcd3245cbb1a8 /sound/x86/intel_hdmi_lpe_audio.h
parentf95e29b92190607c66dc5c96b7e0de9c332062c2 (diff)
downloadlinux-964ca8083c0239b5a729ed08c9f50b6c31ab3a93.tar.xz
ALSA: x86: intel_hdmi: add definitions and logic for DP audio
Imported from legacy patches Note: the new code doesn't assume a modified ELD but an explicit notification that DP is present. It appears that the i915 code does change the ELD so we could use the ELD-based tests to check for DP audio Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com> Signed-off-by: Takashi Iwai <tiwai@suse.de>
Diffstat (limited to 'sound/x86/intel_hdmi_lpe_audio.h')
-rw-r--r--sound/x86/intel_hdmi_lpe_audio.h29
1 files changed, 29 insertions, 0 deletions
diff --git a/sound/x86/intel_hdmi_lpe_audio.h b/sound/x86/intel_hdmi_lpe_audio.h
index ec4bde50dba7..3aed89af5b45 100644
--- a/sound/x86/intel_hdmi_lpe_audio.h
+++ b/sound/x86/intel_hdmi_lpe_audio.h
@@ -31,6 +31,10 @@
#include <sound/control.h>
#include <sound/pcm.h>
+#define AUD_CONFIG_VALID_BIT (1<<9)
+#define AUD_CONFIG_DP_MODE (1<<15)
+#define AUD_CONFIG_BLOCK_BIT (1<<7)
+
#define HMDI_LPE_AUDIO_DRIVER_NAME "intel-hdmi-lpe-audio"
#define HAD_MAX_DEVICES 1
#define HAD_MIN_CHANNEL 2
@@ -68,6 +72,29 @@
#define HAD_MAX_DIP_WORDS 16
#define INTEL_HAD "IntelHdmiLpeAudio"
+/* DP Link Rates */
+#define DP_2_7_GHZ 270000
+#define DP_1_62_GHZ 162000
+
+/* Maud Values */
+#define AUD_SAMPLE_RATE_32_DP_2_7_MAUD_VAL 1988
+#define AUD_SAMPLE_RATE_44_1_DP_2_7_MAUD_VAL 2740
+#define AUD_SAMPLE_RATE_48_DP_2_7_MAUD_VAL 2982
+#define AUD_SAMPLE_RATE_88_2_DP_2_7_MAUD_VAL 5480
+#define AUD_SAMPLE_RATE_96_DP_2_7_MAUD_VAL 5965
+#define AUD_SAMPLE_RATE_176_4_DP_2_7_MAUD_VAL 10961
+#define HAD_MAX_RATE_DP_2_7_MAUD_VAL 11930
+#define AUD_SAMPLE_RATE_32_DP_1_62_MAUD_VAL 3314
+#define AUD_SAMPLE_RATE_44_1_DP_1_62_MAUD_VAL 4567
+#define AUD_SAMPLE_RATE_48_DP_1_62_MAUD_VAL 4971
+#define AUD_SAMPLE_RATE_88_2_DP_1_62_MAUD_VAL 9134
+#define AUD_SAMPLE_RATE_96_DP_1_62_MAUD_VAL 9942
+#define AUD_SAMPLE_RATE_176_4_DP_1_62_MAUD_VAL 18268
+#define HAD_MAX_RATE_DP_1_62_MAUD_VAL 19884
+
+/* Naud Value */
+#define DP_NAUD_VAL 32768
+
/* _AUD_CONFIG register MASK */
#define AUD_CONFIG_MASK_UNDERRUN 0xC0000000
#define AUD_CONFIG_MASK_SRDBG 0x00000002
@@ -618,6 +645,8 @@ enum hdmi_connector_status {
enum had_caps_list {
HAD_GET_ELD = 1,
HAD_GET_DISPLAY_RATE,
+ HAD_GET_DP_OUTPUT,
+ HAD_GET_LINK_RATE,
HAD_SET_ENABLE_AUDIO,
HAD_SET_DISABLE_AUDIO,
HAD_SET_ENABLE_AUDIO_INT,