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Diffstat (limited to 'arch/arm/boot/dts/r8a7745.dtsi')
-rw-r--r--arch/arm/boot/dts/r8a7745.dtsi18
1 files changed, 13 insertions, 5 deletions
diff --git a/arch/arm/boot/dts/r8a7745.dtsi b/arch/arm/boot/dts/r8a7745.dtsi
index 0b2e2f37150f..1f65ff68a469 100644
--- a/arch/arm/boot/dts/r8a7745.dtsi
+++ b/arch/arm/boot/dts/r8a7745.dtsi
@@ -55,11 +55,14 @@
#address-cells = <0>;
interrupt-controller;
reg = <0 0xf1001000 0 0x1000>,
- <0 0xf1002000 0 0x1000>,
+ <0 0xf1002000 0 0x2000>,
<0 0xf1004000 0 0x2000>,
<0 0xf1006000 0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) |
IRQ_TYPE_LEVEL_HIGH)>;
+ clocks = <&cpg CPG_MOD 408>;
+ clock-names = "clk";
+ power-domains = <&sysc R8A7745_PD_ALWAYS_ON>;
};
irqc: interrupt-controller@e61c0000 {
@@ -102,10 +105,9 @@
#power-domain-cells = <0>;
};
- sysc: system-controller@e6180000 {
- compatible = "renesas,r8a7745-sysc";
- reg = <0 0xe6180000 0 0x200>;
- #power-domain-cells = <1>;
+ prr: chipid@ff000044 {
+ compatible = "renesas,prr";
+ reg = <0 0xff000044 0 4>;
};
rst: reset-controller@e6160000 {
@@ -113,6 +115,12 @@
reg = <0 0xe6160000 0 0x100>;
};
+ sysc: system-controller@e6180000 {
+ compatible = "renesas,r8a7745-sysc";
+ reg = <0 0xe6180000 0 0x200>;
+ #power-domain-cells = <1>;
+ };
+
dmac0: dma-controller@e6700000 {
compatible = "renesas,dmac-r8a7745",
"renesas,rcar-dmac";