diff options
Diffstat (limited to 'arch/arm64/boot/dts/mediatek/mt8195.dtsi')
-rw-r--r-- | arch/arm64/boot/dts/mediatek/mt8195.dtsi | 76 |
1 files changed, 64 insertions, 12 deletions
diff --git a/arch/arm64/boot/dts/mediatek/mt8195.dtsi b/arch/arm64/boot/dts/mediatek/mt8195.dtsi index b57e620c2c72..066c14989708 100644 --- a/arch/arm64/boot/dts/mediatek/mt8195.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8195.dtsi @@ -10,7 +10,6 @@ #include <dt-bindings/interrupt-controller/irq.h> #include <dt-bindings/phy/phy.h> #include <dt-bindings/pinctrl/mt8195-pinfunc.h> -#include <dt-bindings/reset/ti-syscon.h> / { compatible = "mediatek,mt8195"; @@ -295,17 +294,7 @@ compatible = "mediatek,mt8195-infracfg_ao", "syscon", "simple-mfd"; reg = <0 0x10001000 0 0x1000>; #clock-cells = <1>; - - infracfg_rst: reset-controller { - compatible = "ti,syscon-reset"; - #reset-cells = <1>; - ti,reset-bits = < - 0x140 18 0x144 18 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* pcie */ - 0x120 0 0x124 0 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* thermal */ - 0x730 10 0x734 10 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* thermal */ - 0x150 5 0x154 5 0 0 (ASSERT_SET | DEASSERT_SET | STATUS_NONE) /* svs gpu */ - >; - }; + #reset-cells = <1>; }; pericfg: syscon@10003000 { @@ -573,6 +562,8 @@ <&apmixedsys CLK_APMIXED_USB1PLL>, <&infracfg_ao CLK_INFRA_AO_SSUSB_XHCI>; clock-names = "sys_ck", "ref_ck", "mcu_ck", "xhci_ck"; + mediatek,syscon-wakeup = <&pericfg 0x400 103>; + wakeup-source; status = "disabled"; }; @@ -636,6 +627,8 @@ <&apmixedsys CLK_APMIXED_USB1PLL>, <&pericfg_ao CLK_PERI_AO_SSUSB_1P_XHCI>; clock-names = "sys_ck", "ref_ck", "mcu_ck","xhci_ck"; + mediatek,syscon-wakeup = <&pericfg 0x400 104>; + wakeup-source; status = "disabled"; }; @@ -655,6 +648,8 @@ <&topckgen CLK_TOP_SSUSB_P2_REF>, <&pericfg_ao CLK_PERI_AO_SSUSB_2P_XHCI>; clock-names = "sys_ck", "ref_ck", "xhci_ck"; + mediatek,syscon-wakeup = <&pericfg 0x400 105>; + wakeup-source; status = "disabled"; }; @@ -674,6 +669,8 @@ <&topckgen CLK_TOP_SSUSB_P3_REF>, <&pericfg_ao CLK_PERI_AO_SSUSB_3P_XHCI>; clock-names = "sys_ck", "ref_ck", "xhci_ck"; + mediatek,syscon-wakeup = <&pericfg 0x400 106>; + wakeup-source; status = "disabled"; }; @@ -691,6 +688,53 @@ status = "disabled"; }; + efuse: efuse@11c10000 { + compatible = "mediatek,mt8195-efuse", "mediatek,efuse"; + reg = <0 0x11c10000 0 0x1000>; + #address-cells = <1>; + #size-cells = <1>; + u3_tx_imp_p0: usb3-tx-imp@184,1 { + reg = <0x184 0x1>; + bits = <0 5>; + }; + u3_rx_imp_p0: usb3-rx-imp@184,2 { + reg = <0x184 0x2>; + bits = <5 5>; + }; + u3_intr_p0: usb3-intr@185 { + reg = <0x185 0x1>; + bits = <2 6>; + }; + comb_tx_imp_p1: usb3-tx-imp@186,1 { + reg = <0x186 0x1>; + bits = <0 5>; + }; + comb_rx_imp_p1: usb3-rx-imp@186,2 { + reg = <0x186 0x2>; + bits = <5 5>; + }; + comb_intr_p1: usb3-intr@187 { + reg = <0x187 0x1>; + bits = <2 6>; + }; + u2_intr_p0: usb2-intr-p0@188,1 { + reg = <0x188 0x1>; + bits = <0 5>; + }; + u2_intr_p1: usb2-intr-p1@188,2 { + reg = <0x188 0x2>; + bits = <5 5>; + }; + u2_intr_p2: usb2-intr-p2@189,1 { + reg = <0x189 0x1>; + bits = <2 5>; + }; + u2_intr_p3: usb2-intr-p3@189,2 { + reg = <0x189 0x2>; + bits = <7 5>; + }; + }; + u3phy2: t-phy@11c40000 { compatible = "mediatek,mt8195-tphy", "mediatek,generic-tphy-v3"; #address-cells = <1>; @@ -873,6 +917,10 @@ clocks = <&apmixedsys CLK_APMIXED_PLL_SSUSB26M>, <&topckgen CLK_TOP_SSUSB_PHY_P1_REF>; clock-names = "ref", "da_ref"; + nvmem-cells = <&comb_intr_p1>, + <&comb_rx_imp_p1>, + <&comb_tx_imp_p1>; + nvmem-cell-names = "intr", "rx_imp", "tx_imp"; #phy-cells = <1>; }; }; @@ -897,6 +945,10 @@ clocks = <&apmixedsys CLK_APMIXED_PLL_SSUSB26M>, <&topckgen CLK_TOP_SSUSB_PHY_REF>; clock-names = "ref", "da_ref"; + nvmem-cells = <&u3_intr_p0>, + <&u3_rx_imp_p0>, + <&u3_tx_imp_p0>; + nvmem-cell-names = "intr", "rx_imp", "tx_imp"; #phy-cells = <1>; }; }; |