diff options
Diffstat (limited to 'drivers/staging/vt6655/baseband.c')
| -rw-r--r-- | drivers/staging/vt6655/baseband.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/drivers/staging/vt6655/baseband.c b/drivers/staging/vt6655/baseband.c index dfdb0ebf43b5..577a38fae369 100644 --- a/drivers/staging/vt6655/baseband.c +++ b/drivers/staging/vt6655/baseband.c @@ -29,7 +29,6 @@ * */ -#include "tmacro.h" #include "mac.h" #include "baseband.h" #include "srom.h" @@ -1910,19 +1909,19 @@ bool bb_read_embedded(struct vnt_private *priv, unsigned char by_bb_addr, unsigned char by_value; /* BB reg offset */ - VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr); + iowrite8(by_bb_addr, iobase + MAC_REG_BBREGADR); /* turn on REGR */ MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGR); /* W_MAX_TIMEOUT is the timeout period */ for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { - VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value); + by_value = ioread8(iobase + MAC_REG_BBREGCTL); if (by_value & BBREGCTL_DONE) break; } /* get BB data */ - VNSvInPortB(iobase + MAC_REG_BBREGDATA, pby_data); + *pby_data = ioread8(iobase + MAC_REG_BBREGDATA); if (ww == W_MAX_TIMEOUT) { pr_debug(" DBG_PORT80(0x30)\n"); @@ -1953,15 +1952,15 @@ bool bb_write_embedded(struct vnt_private *priv, unsigned char by_bb_addr, unsigned char by_value; /* BB reg offset */ - VNSvOutPortB(iobase + MAC_REG_BBREGADR, by_bb_addr); + iowrite8(by_bb_addr, iobase + MAC_REG_BBREGADR); /* set BB data */ - VNSvOutPortB(iobase + MAC_REG_BBREGDATA, by_data); + iowrite8(by_data, iobase + MAC_REG_BBREGDATA); /* turn on BBREGCTL_REGW */ MACvRegBitsOn(iobase, MAC_REG_BBREGCTL, BBREGCTL_REGW); /* W_MAX_TIMEOUT is the timeout period */ for (ww = 0; ww < W_MAX_TIMEOUT; ww++) { - VNSvInPortB(iobase + MAC_REG_BBREGCTL, &by_value); + by_value = ioread8(iobase + MAC_REG_BBREGCTL); if (by_value & BBREGCTL_DONE) break; } @@ -2054,7 +2053,7 @@ bool bb_vt3253_init(struct vnt_private *priv) byVT3253B0_AGC[ii][0], byVT3253B0_AGC[ii][1]); - VNSvOutPortB(iobase + MAC_REG_ITRTMSET, 0x23); + iowrite8(0x23, iobase + MAC_REG_ITRTMSET); MACvRegBitsOn(iobase, MAC_REG_PAPEDELAY, BIT(0)); priv->abyBBVGA[0] = 0x14; |