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2024-02-21dt-bindings: display: renesas,rzg2l-du: Document RZ/V2L DU bindingsBiju Das1-2/+7
Document DU found in RZ/V2L SoC. The DU block is identical to RZ/G2L SoC and therefore use RZ/G2L fallback to avoid any driver changes. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Link: https://lore.kernel.org/r/20240218164840.57662-3-biju.das.jz@bp.renesas.com Signed-off-by: Maxime Ripard <mripard@kernel.org>
2024-02-21dt-bindings: display: Document Renesas RZ/G2L DU bindingsBiju Das1-0/+121
The RZ/G2L LCD controller is composed of Frame Compression Processor (FCPVD), Video Signal Processor (VSPD), and Display Unit (DU). The DU module supports the following hardware features − Display Parallel Interface (DPI) and MIPI LINK Video Interface − Display timing master − Generates video timings − Selecting the polarity of output DCLK, HSYNC, VSYNC, and DE − Supports Progressive − Input data format (from VSPD): RGB888, RGB666 − Output data format: same as Input data format − Supporting Full HD (1920 pixels x 1080 lines) for MIPI-DSI Output − Supporting WXGA (1280 pixels x 800 lines) for Parallel Output This patch documents the DU module found on RZ/G2L LCDC. Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com> Reviewed-by: Rob Herring <robh@kernel.org> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Link: https://lore.kernel.org/r/20240218164840.57662-2-biju.das.jz@bp.renesas.com Signed-off-by: Maxime Ripard <mripard@kernel.org>