index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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bindings
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riscv
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2021-09-05
Merge tag 'riscv-for-linus-5.15-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
1
-0
/
+27
2021-08-20
dt-bindings: sifive-l2-cache: Fix 'select' matching
Rob Herring
1
-4
/
+4
2021-08-04
dt-bindings: riscv: add starfive jh7100 bindings
Drew Fustini
1
-0
/
+27
2021-06-21
dt-bindings: Drop redundant minItems/maxItems
Rob Herring
1
-1
/
+0
2021-04-26
dt-bindings: riscv: microchip: Add YAML documentation for the PolarFire SoC
Atish Patra
1
-0
/
+27
2021-02-26
Merge tag 'riscv-for-linus-5.12-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
4
-9
/
+97
2021-02-23
dt-bindings: update risc-v cpu properties
Damien Le Moal
1
-0
/
+2
2021-02-23
dt-bindings: add Canaan boards compatible strings
Damien Le Moal
1
-0
/
+47
2021-01-12
dt-bindings: Add missing array size constraints
Rob Herring
1
-0
/
+1
2021-01-08
dt-bindings: riscv: Update YAML doc to support SiFive HiFive Unmatched board
Yash Shah
1
-5
/
+12
2021-01-08
dt-bindings: riscv: Update DT binding docs to support SiFive FU740 SoC
Yash Shah
1
-0
/
+6
2021-01-08
dt-bindings: riscv: Update l2 cache DT documentation to add support for SiFiv...
Yash Shah
1
-4
/
+30
2020-10-27
dt-bindings: Explicitly allow additional properties in board/SoC schemas
Rob Herring
1
-0
/
+3
2020-10-27
dt-bindings: More whitespace clean-ups in schema files
Rob Herring
1
-2
/
+2
2020-10-07
dt-bindings: Explicitly allow additional properties in common schemas
Rob Herring
1
-0
/
+2
2020-10-01
dt-bindings: riscv: sifive-l2-cache: convert bindings to json-schema
Sagar Kadam
2
-51
/
+98
2020-05-03
dt-bindings: Remove cases of 'allOf' containing a '$ref'
Rob Herring
1
-11
/
+9
2019-10-23
dt-bindings: riscv: Fix CPU schema errors
Rob Herring
1
-16
/
+13
2019-08-09
dt-bindings: riscv: fix the schema compatible string for the HiFive Unleashed...
Paul Walmsley
1
-1
/
+1
2019-08-09
dt-bindings: riscv: remove obsolete cpus.txt
Paul Walmsley
2
-162
/
+12
2019-08-09
dt-bindings: Update the riscv,isa string description
Atish Patra
1
-0
/
+4
2019-07-21
dt-bindings: riscv: Limit cpus schema to only check RiscV 'cpu' nodes
Rob Herring
1
-82
/
+61
2019-06-26
dt-bindings: riscv: resolve 'make dt_binding_check' warnings
Paul Walmsley
1
-12
/
+14
2019-06-17
dt-bindings: riscv: convert cpu binding to json-schema
Paul Walmsley
1
-0
/
+168
2019-06-17
dt-bindings: riscv: sifive: add YAML documentation for the SiFive FU540
Paul Walmsley
1
-0
/
+25
2019-05-17
RISC-V: Add DT documentation for SiFive L2 Cache Controller
Yash Shah
1
-0
/
+51
2017-09-26
dt-bindings: RISC-V CPU Bindings
Palmer Dabbelt
1
-0
/
+162