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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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/
arch
/
arm
/
mm
/
context.c
Age
Commit message (
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Author
Files
Lines
2021-10-30
ARM: 9150/1: Fix PID_IN_CONTEXTIDR regression when THREAD_INFO_IN_TASK=y
Ard Biesheuvel
1
-1
/
+1
2019-06-19
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500
Thomas Gleixner
1
-4
/
+1
2015-12-03
ARM: 8465/1: mm: keep reserved ASIDs in sync with mm after multiple rollovers
Will Deacon
1
-12
/
+26
2015-02-03
ARM: 8299/1: mm: ensure local active ASID is marked as allocated on rollover
Will Deacon
1
-15
/
+11
2014-11-21
ARM: 8203/1: mm: try to re-use old ASID assignments following a rollover
Will Deacon
1
-24
/
+34
2013-12-29
ARM: 7926/1: mm: flesh out and fix the comments in the ASID allocator
Will Deacon
1
-6
/
+10
2013-12-29
ARM: 7925/1: mm: keep track of last ASID allocation to improve bitmap searching
Will Deacon
1
-1
/
+3
2013-12-29
ARM: 7924/1: mm: don't bother with reserved ttbr0 when running with LPAE
Will Deacon
1
-10
/
+11
2013-08-12
ARM: tlb: don't perform inner-shareable invalidation for local TLB ops
Will Deacon
1
-6
/
+1
2013-07-26
ARM: 7789/1: Do not run dummy_flush_tlb_a15_erratum() on non-Cortex-A15
Fabio Estevam
1
-1
/
+2
2013-06-29
Merge branch 'devel-stable' into for-next
Russell King
1
-7
/
+2
2013-06-24
ARM: 7769/1: Cortex-A15: fix erratum 798181 implementation
Marc Zyngier
1
-1
/
+28
2013-06-24
ARM: 7768/1: prevent risks of out-of-bound access in ASID allocator
Marc Zyngier
1
-9
/
+8
2013-06-24
ARM: 7767/1: let the ASID allocator handle suspended animation
Marc Zyngier
1
-0
/
+9
2013-05-30
ARM: LPAE: use 64-bit accessors for TTBR registers
Cyril Chemparathy
1
-7
/
+2
2013-04-03
ARM: 7684/1: errata: Workaround for Cortex-A15 erratum 798181 (TLBI/DSB opera...
Catalin Marinas
1
-1
/
+2
2013-03-04
ARM: 7661/1: mm: perform explicit branch predictor maintenance when required
Will Deacon
1
-1
/
+3
2013-03-04
ARM: 7659/1: mm: make mm->context.id an atomic64_t variable
Will Deacon
1
-8
/
+13
2013-03-04
ARM: 7658/1: mm: fix race updating mm->context.id on ASID rollover
Will Deacon
1
-3
/
+3
2013-02-16
ARM: 7649/1: mm: mm->context.id fix for big-endian
Ben Dooks
1
-0
/
+3
2012-11-26
ARM: 7582/2: rename kvm_seq to vmalloc_seq so to avoid confusion with KVM
Nicolas Pitre
1
-2
/
+2
2012-11-05
ARM: mm: use bitmap operations when allocating new ASIDs
Will Deacon
1
-19
/
+35
2012-11-05
ARM: mm: avoid taking ASID spinlock on fastpath
Will Deacon
1
-8
/
+15
2012-11-05
ARM: mm: remove IPI broadcasting on ASID rollover
Will Deacon
1
-100
/
+86
2012-08-25
ARM: 7502/1: contextidr: avoid using bfi instruction during notifier
Will Deacon
1
-3
/
+4
2012-07-09
ARM: 7445/1: mm: update CONTEXTIDR register to contain PID of current process
Will Deacon
1
-0
/
+35
2012-04-17
ARM: Remove current_mm per-cpu variable
Catalin Marinas
1
-11
/
+1
2012-04-17
ARM: Remove __ARCH_WANT_INTERRUPTS_ON_CTXSW on ASID-capable CPUs
Catalin Marinas
1
-2
/
+2
2012-04-17
ARM: Use TTBR1 instead of reserved context ID
Will Deacon
1
-18
/
+27
2011-12-08
ARM: LPAE: Add context switching support
Catalin Marinas
1
-2
/
+17
2011-09-13
locking, ARM: Annotate low level hw locks as raw
Thomas Gleixner
1
-7
/
+7
2011-06-09
Revert "ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks"
Russell King
1
-3
/
+3
2011-06-09
Revert "ARM: 6943/1: mm: use TTBR1 instead of reserved context ID"
Russell King
1
-6
/
+5
2011-05-26
ARM: 6944/1: mm: allow ASID 0 to be allocated to tasks
Will Deacon
1
-3
/
+3
2011-05-26
ARM: 6943/1: mm: use TTBR1 instead of reserved context ID
Will Deacon
1
-5
/
+6
2010-02-16
ARM: 5905/1: ARM: Global ASID allocation on SMP
Catalin Marinas
1
-14
/
+110
2009-10-29
ARM: Fix errata 411920 workarounds
Russell King
1
-4
/
+1
2009-09-24
cpumask: use mm_cpumask() wrapper: arm
Rusty Russell
1
-1
/
+1
2007-05-09
Merge branches 'armv7', 'at91', 'misc' and 'omap' into devel
Russell King
1
-3
/
+7
2007-05-09
[ARM] armv7: add support for asid-tagged VIVT I-cache
Catalin Marinas
1
-0
/
+7
2007-05-08
[ARM] Fix ASID version switch
Russell King
1
-3
/
+7
2007-02-08
[ARM] 4128/1: Architecture compliant TTBR changing sequence
Catalin Marinas
1
-2
/
+10
2006-09-20
[ARM] Move mmu.c out of the way
Russell King
1
-0
/
+45