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path: root/arch/mips/mm/sc-mips.c
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2020-12-14mips: fix Section mismatch in referenceAnders Roxell1-2/+2
2020-09-27MIPS: Ingenic: Fix bugs when detecting L2 cache of JZ4775 and X1000E.周琰杰 (Zhou Yanjie)1-0/+2
2020-06-09mm: don't include asm/pgtable.h if linux/mm.h is already includedMike Rapoport1-1/+0
2020-05-22mips: Add MIPS Release 5 supportSerge Semin1-3/+4
2019-08-06MIPS: Ingenic: Fix bugs when detecting X1000's L2 cache.Zhou Yanjie1-7/+20
2019-07-22MIPS: Rename JZRISC to XBURSTPaul Cercueil1-1/+1
2018-01-19MIPS: JZ4770: Work around config2 misreporting associativityMaarten ter Huurne1-0/+9
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-08-30MIPS: CPS: Have asm/mips-cps.h include CM & CPC headersPaul Burton1-1/+1
2017-08-30MIPS: CPS: Use change_*, set_* & clear_* where appropriatePaul Burton1-14/+5
2017-08-29MIPS: CM: Use BIT/GENMASK for register fields, order & drop shiftsPaul Burton1-18/+18
2017-01-03MIPS: sc-mips: L2 cache is inclusive of L1 dcache for CM3Paul Burton1-0/+1
2016-05-13MIPS: Add P6600 cases to CPU switch statementsPaul Burton1-0/+1
2016-02-29MIPS: scache: Fix scache init with invalid line size.Govindraj Raja1-4/+9
2016-02-09MIPS: Fix early CM probingPaul Burton1-10/+0
2015-10-26MIPS: Enable L2 prefetching for CM >= 2.5Paul Burton1-1/+60
2015-10-26MIPS: Remove invalid checkAndrzej Hajda1-2/+2
2015-08-26MIPS: Add platform callback before initializing the L2 cacheMarkos Chandras1-0/+10
2015-08-26MIPS: CM3: Add support for CM3 L2 cache.Paul Burton1-0/+32
2015-02-17MIPS: mm: scache: Add secondary cache support for MIPS R6 coresMarkos Chandras1-1/+2
2015-02-16MIPS: Add cases for CPU_QEMU_GENERICLeonid Yegoshin1-0/+1
2014-03-27MIPS: Add cases for CPU_P5600James Hogan1-0/+1
2014-03-07MIPS: Add 1074K CPU support explicitly.Steven J. Hill1-0/+1
2014-01-22MIPS: Add support for interAptiv coresLeonid Yegoshin1-0/+1
2014-01-22MIPS: Add support for the proAptiv coresLeonid Yegoshin1-0/+1
2013-09-17MIPS: Optimize current_cpu_type() for better code.Ralf Baechle1-1/+2
2013-07-15MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker1-1/+1
2013-04-05MIPS: Fix ISA level which causes secondary cache init bypassing and moreDeng-Cheng Zhu1-4/+2
2012-03-28Disintegrate asm/system.h for MIPSDavid Howells1-1/+0
2010-12-17MIPS: Fix build errors in sc-mips.cKevin Cernekee1-0/+4
2010-10-29MIPS: Honor L2 bypass bitKevin Cernekee1-4/+30
2009-09-30MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.Kevin Cernekee1-0/+5
2008-03-12[MIPS] Fix loads of section missmatchesRalf Baechle1-2/+1
2007-10-12[MIPS] Fix "no space between function name and open parenthesis" warnings.Ralf Baechle1-1/+1
2006-06-30[MIPS] MIPS32/MIPS64 S-cache fix and cleanupAtsushi Nemoto1-32/+3
2006-06-30[MIPS] MIPS32/MIPS64 secondary cache managementChris Dearman1-0/+141