summaryrefslogtreecommitdiff
path: root/arch/riscv/include/asm/alternative.h
AgeCommit message (Expand)AuthorFilesLines
2023-09-08Merge patch series "Add non-coherent DMA support for AX45MP"Palmer Dabbelt1-0/+3
2023-09-01riscv: errata: Add Andes alternative portsLad Prabhakar1-0/+3
2023-09-01RISC-V: alternative: Remove feature_probe_funcEvan Green1-5/+0
2023-04-26RISC-V: hwprobe: Remove __init on probe_vendor_features()Evan Green1-1/+1
2023-04-19Merge patch series "RISC-V Hardware Probing User Interface"Palmer Dabbelt1-0/+5
2023-04-19RISC-V: hwprobe: Support probing of misaligned access performanceEvan Green1-0/+5
2023-03-15RISC-V: cpufeatures: Put the upper 16 bits of patch ID to workAndrew Jones1-0/+4
2023-03-15riscv: alternatives: Rename errata_id to patch_idAndrew Jones1-2/+2
2023-03-15riscv: alternatives: Remove unnecessary define and unused structAndrew Jones1-7/+0
2023-02-01riscv: switch to relative alternative entriesJisheng Zhang1-6/+11
2022-12-29RISC-V: fix auipc-jalr addresses in patched alternativesHeiko Stuebner1-0/+3
2022-05-12riscv: add memory-type errata for T-HeadHeiko Stuebner1-0/+6
2022-05-12riscv: add RISC-V Svpbmt extension supportHeiko Stuebner1-0/+3
2022-05-12riscv: implement module alternativesHeiko Stuebner1-0/+3
2022-05-12riscv: allow different stages with alternativesHeiko Stuebner1-1/+4
2022-05-12riscv: integrate alternatives better into the main architectureHeiko Stuebner1-0/+8
2021-04-26riscv: sifive: Add SiFive alternative portsVincent Chen1-0/+3
2021-04-26riscv: Introduce alternative mechanism to apply errata solutionVincent Chen1-0/+36