| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-05-11 | RISC-V: Move to queued RW locks | Palmer Dabbelt | 1 | -24/+0 |
| 2022-05-11 | RISC-V: Move to generic spinlocks | Palmer Dabbelt | 1 | -5/+4 |
| 2021-12-07 | locking: Allow to include asm/spinlock_types.h from linux/spinlock_types_raw.h | Sebastian Andrzej Siewior | 1 | -1/+1 |
| 2019-11-12 | riscv: clean up the macro format in each header file | Zong Li | 1 | -1/+1 |
| 2019-06-05 | treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286 | Thomas Gleixner | 1 | -9/+1 |
| 2017-09-27 | RISC-V: Atomic and Locking Code | Palmer Dabbelt | 1 | -0/+33 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |