starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-03-22	Merge tag 'riscv-for-linus-6.9-mw2' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	1	-255/+1
2024-03-13	Merge patch series "riscv: Use Kconfig to set unaligned access speed"	Palmer Dabbelt	1	-255/+0
2024-03-13	riscv: Set unaligned access speed at compile time	Charlie Jenkins	1	-272/+0
2024-03-13	riscv: Decouple emulated unaligned accesses from access speed	Charlie Jenkins	1	-4/+21
2024-03-13	riscv: lib: Introduce has_fast_unaligned_access()	Charlie Jenkins	1	-3/+3
2024-03-12	perf: RISC-V: Introduce Andes PMU to support perf event sampling	Yu Chien Peter Lin	1	-0/+1
2024-02-29	Merge patch series "riscv: cbo.zero fixes"	Palmer Dabbelt	1	-3/+13
2024-02-29	riscv: Add a custom ISA extension for the [ms]envcfg CSR	Samuel Holland	1	-2/+12
2024-02-29	riscv: Fix enabling cbo.zero when running in M-mode	Samuel Holland	1	-1/+1
2024-02-23	RISC-V: Ignore V from the riscv,isa DT property on older T-Head CPUs	Conor Dooley	1	-0/+15
2024-01-18	Merge patch series "riscv: Add fine-tuned checksum functions"	Palmer Dabbelt	1	-3/+87
2024-01-18	riscv: Add static key for misaligned accesses	Charlie Jenkins	1	-3/+87
2024-01-10	Merge patch series "riscv: hwprobe: add Zicond, Zacas and Ztso support"	Palmer Dabbelt	1	-0/+2
2024-01-10	riscv: add ISA extension parsing for Zacas	Clément Léger	1	-0/+1
2024-01-10	riscv: add ISA extension parsing for Ztso	Clément Léger	1	-0/+1
2024-01-03	RISC-V: Remove the removed single-letter extensions	Palmer Dabbelt	1	-4/+0
2023-12-13	riscv: add ISA extension parsing for Zfa	Clément Léger	1	-0/+1
2023-12-13	riscv: add ISA extension parsing for Zvfh[min]	Clément Léger	1	-0/+2
2023-12-13	riscv: add ISA extension parsing for Zihintntl	Clément Léger	1	-0/+1
2023-12-13	riscv: add ISA extension parsing for Zfh/Zfh[min]	Clément Léger	1	-0/+2
2023-12-13	riscv: add ISA extension parsing for vector crypto	Clément Léger	1	-0/+64
2023-12-13	riscv: add ISA extension parsing for scalar crypto	Evan Green	1	-23/+95
2023-12-13	riscv: add ISA extension parsing for Zbc	Clément Léger	1	-0/+1
2023-11-10	Merge tag 'riscv-for-linus-6.7-mw2' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	1	-13/+79
2023-11-08	Merge tag 'riscv-for-linus-6.7-rc1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	1	-5/+12
2023-11-08	RISC-V: Probe misaligned access speed in parallel	Evan Green	1	-19/+77
2023-11-05	riscv: don't probe unaligned access speed if already done	Jisheng Zhang	1	-0/+4
2023-11-05	Merge patch series "Add support to handle misaligned accesses in S-mode"	Palmer Dabbelt	1	-1/+5
2023-11-01	riscv: report misaligned accesses emulation to hwprobe	Clément Léger	1	-0/+4
2023-11-01	riscv: annotate check_unaligned_access_boot_cpu() with __init	Clément Léger	1	-1/+1
2023-11-01	RISC-V: clarify the QEMU workaround in ISA parser	Tsukasa OI	1	-3/+4
2023-10-12	RISC-V: Detect Zicond from ISA string	Anup Patel	1	-0/+1
2023-10-12	RISC-V: Detect Smstateen extension	Mayuresh Chitale	1	-0/+1
2023-09-21	RISC-V: Enable cbo.zero in usermode	Andrew Jones	1	-0/+6
2023-09-21	RISC-V: Make zicbom/zicboz errors consistent	Andrew Jones	1	-2/+2
2023-09-08	Merge patch series "RISC-V: Probe for misaligned access speed"	Palmer Dabbelt	1	-0/+104
2023-09-01	RISC-V: Probe for unaligned access speed	Evan Green	1	-0/+104
2023-09-01	Merge tag 'riscv-for-linus-6.6-mw1' of git://git.kernel.org/pub/scm/linux/ker...	Linus Torvalds	1	-181/+340
2023-08-31	Merge tag 'devicetree-header-cleanups-for-6.6' of git://git.kernel.org/pub/sc...	Linus Torvalds	1	-1/+0
2023-08-28	riscv: Explicitly include correct DT includes	Rob Herring	1	-1/+0
2023-07-26	RISC-V: provide Kconfig & commandline options to control parsing "riscv,isa"	Conor Dooley	1	-1/+13
2023-07-26	RISC-V: enable extension detection from dedicated properties	Conor Dooley	1	-4/+74
2023-07-26	RISC-V: split riscv_fill_hwcap() in 3	Conor Dooley	1	-168/+177
2023-07-26	RISC-V: add single letter extensions to riscv_isa_ext	Conor Dooley	1	-0/+13
2023-07-26	RISC-V: repurpose riscv_isa_ext array in riscv_fill_hwcap()	Conor Dooley	1	-21/+9
2023-07-26	RISC-V: shunt isa_ext_arr to cpufeature.c	Conor Dooley	1	-0/+67
2023-07-12	RISC-V: Don't include Zicsr or Zifencei in I from ACPI	Palmer Dabbelt	1	-7/+2
2023-06-23	Merge patch series "ISA string parser cleanups"	Palmer Dabbelt	1	-23/+85
2023-06-21	RISC-V: always report presence of extensions formerly part of the base ISA	Conor Dooley	1	-0/+17
2023-06-21	RISC-V: remove decrement/increment dance in ISA string parser	Conor Dooley	1	-8/+6