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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
arch
/
riscv
/
kernel
/
irq.c
Age
Commit message (
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Author
Files
Lines
2023-08-16
riscv: stack: Fixup independent softirq stack for CONFIG_FRAME_POINTER=n
Guo Ren
1
-0
/
+3
2023-06-22
riscv: stack: Support HAVE_SOFTIRQ_ON_OWN_STACK
Guo Ren
1
-0
/
+35
2023-06-22
riscv: stack: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
Guo Ren
1
-0
/
+33
2023-04-08
RISC-V: Treat IPIs as normal Linux IRQs
Anup Patel
1
-1
/
+2
2023-04-08
irqchip/riscv-intc: Allow drivers to directly discover INTC hwnode
Anup Patel
1
-0
/
+18
2020-06-10
RISC-V: Remove do_IRQ() function
Anup Patel
1
-6
/
+0
2020-06-10
irqchip: RISC-V per-HART local interrupt controller driver
Anup Patel
1
-30
/
+3
2020-06-10
RISC-V: self-contained IPI handling routine
Anup Patel
1
-6
/
+10
2020-01-05
riscv: prefix IRQ_ macro names with an RV_ namespace
Paul Walmsley
1
-3
/
+3
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
1
-12
/
+5
2019-10-28
riscv: for C functions called only from assembly, mark with __visible
Paul Walmsley
1
-1
/
+1
2019-05-17
RISC-V: Add interrupt related SCAUSE defines in asm/csr.h
Anup Patel
1
-12
/
+4
2019-04-26
riscv: print the unexpected interrupt cause
Christoph Hellwig
1
-1
/
+2
2018-10-23
RISC-V: Show IPI stats
Anup Patel
1
-0
/
+8
2018-10-23
RISC-V: No need to pass scause as arg to do_IRQ()
Anup Patel
1
-2
/
+2
2018-08-13
clocksource: new RISC-V SBI timer driver
Palmer Dabbelt
1
-0
/
+3
2018-08-13
RISC-V: implement low-level interrupt handling
Christoph Hellwig
1
-9
/
+43
2018-07-05
RISC-V: Don't include irq-riscv-intc.h
Palmer Dabbelt
1
-4
/
+0
2018-03-14
RISC-V: Move to the new GENERIC_IRQ_MULTI_HANDLER handler
Palmer Dabbelt
1
-13
/
+0
2017-09-27
RISC-V: Init and Halt Code
Palmer Dabbelt
1
-0
/
+39