starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2024-01-18	riscv: optimize ELF relocation function in riscv	Maxim Kochetkov	1	-4/+16
2024-01-11	Merge patch series "riscv: modules: Fix module loading error handling"	Palmer Dabbelt	1	-5/+9
2024-01-10	riscv: Fix relocation_hashtable size	Charlie Jenkins	1	-1/+1
2024-01-10	riscv: Correctly free relocation hashtable on error	Charlie Jenkins	1	-3/+7
2024-01-10	riscv: Fix module loading free order	Charlie Jenkins	1	-1/+1
2024-01-09	riscv: Fix module_alloc() that did not reset the linear mapping permissions	Alexandre Ghiti	1	-1/+2
2023-12-04	riscv: Correct type casting in module loading	Charlie Jenkins	1	-2/+2
2023-12-04	riscv: Safely remove entries from relocation list	Charlie Jenkins	1	-28/+82
2023-11-08	RISC-V: Don't rely on positional structure initialization	Palmer Dabbelt	1	-60/+65
2023-11-08	riscv: Add remaining module relocations	Charlie Jenkins	1	-29/+419
2023-11-08	riscv: Avoid unaligned access when relocating modules	Emil Renner Berthing	1	-76/+81
2023-02-01	riscv: module: Add ADD16 and SUB16 rela types	Andrew Jones	1	-0/+16
2023-02-01	riscv: module: move find_section to module.h	Jisheng Zhang	1	-15/+0
2022-05-12	riscv: implement module alternatives	Heiko Stuebner	1	-0/+29
2022-03-31	RISC-V: module: fix apply_r_riscv_rcv_branch_rela typo	Wu Caize	1	-2/+2
2022-03-11	riscv: Fix auipc+jalr relocation range checks	Emil Renner Berthing	1	-5/+16
2021-04-26	riscv: module: Create module allocations without exec permissions	Jisheng Zhang	1	-1/+1
2021-04-26	riscv: Move kernel mapping outside of linear mapping	Alexandre Ghiti	1	-4/+2
2020-07-30	riscv: Support R_RISCV_ADD64 and R_RISCV_SUB64 relocs	Emil Renner Berthing	1	-0/+16
2020-06-09	mm: introduce include/linux/pgtable.h	Mike Rapoport	1	-1/+1
2020-03-03	riscv: avoid the PIC offset of static percpu data in module beyond 2G limits	Vincent Chen	1	-0/+16
2019-10-18	riscv: Use pr_warn instead of pr_warning	Kefeng Wang	1	-2/+2
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	Thomas Gleixner	1	-9/+1
2019-03-29	RISC-V: Use IS_ENABLED(CONFIG_CMODEL_MEDLOW)	Joe Perches	1	-1/+1
2018-11-13	RISC-V: Silence some module warnings on 32-bit	Olof Johansson	1	-6/+6
2018-07-05	RISC-V: Fix the rv32i kernel build	Palmer Dabbelt	1	-11/+11
2018-07-05	RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocations	Andreas Schwab	1	-2/+2
2018-07-04	RISC-V: Change variable type for 32-bit compatible	Zong Li	1	-11/+11
2018-06-11	RISC-V: Handle R_RISCV_32 in modules	Andreas Schwab	1	-0/+12
2018-04-03	RISC-V: Support SUB32 relocation type in kernel module	Zong Li	1	-0/+8
2018-04-03	RISC-V: Support ADD32 relocation type in kernel module	Zong Li	1	-0/+8
2018-04-03	RISC-V: Support ALIGN relocation type in kernel module	Zong Li	1	-0/+10
2018-04-03	RISC-V: Support RVC_BRANCH/JUMP relocation type in kernel modulewq	Zong Li	1	-0/+35
2018-04-03	RISC-V: Support HI20/LO12_I/LO12_S relocation type in kernel module	Zong Li	1	-0/+42
2018-04-03	RISC-V: Support CALL relocation type in kernel module	Zong Li	1	-0/+22
2018-04-03	RISC-V: Support GOT_HI20/CALL_PLT relocation type in kernel module	Zong Li	1	-10/+52
2017-09-27	RISC-V: User-facing API	Palmer Dabbelt	1	-0/+217