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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
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beaglev-5.13.y
beaglev_fedora_devel
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fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
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starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
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visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
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visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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riscv
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kernel
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traps.c
Age
Commit message (
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Author
Files
Lines
2023-08-16
riscv: stack: Fixup independent irq stack for CONFIG_FRAME_POINTER=n
Guo Ren
1
-0
/
+3
2023-08-16
riscv: entry: set a0 = -ENOSYS only when syscall != -1
Celeste Liu
1
-3
/
+3
2023-07-04
riscv: Discard vector state on syscalls
Björn Töpel
1
-0
/
+2
2023-07-01
riscv: vector: only enable interrupts in the first-use trap
Andy Chiu
1
-1
/
+7
2023-06-22
riscv: stack: Support HAVE_IRQ_EXIT_ON_IRQ_STACK
Guo Ren
1
-2
/
+33
2023-06-08
riscv: Allocate user's vector context in the first-use trap
Andy Chiu
1
-2
/
+24
2023-04-11
riscv: entry: Save a0 prior syscall_enter_from_user_mode()
Björn Töpel
1
-2
/
+2
2023-03-23
riscv: entry: Convert to generic entry
Guo Ren
1
-18
/
+122
2023-03-23
riscv: entry: Add noinstr to prevent instrumentation inserted
Guo Ren
1
-2
/
+2
2023-02-22
Merge patch series "riscv: Dump faulting instructions in oops handler"
Palmer Dabbelt
1
-1
/
+24
2023-02-22
riscv: Avoid enabling interrupts in die()
Mattias Nissler
1
-2
/
+3
2023-02-22
riscv: Add instruction dump to RISC-V splats
Björn Töpel
1
-1
/
+24
2022-12-12
Merge patch series "RISC-V: Align the shadow stack"
Palmer Dabbelt
1
-3
/
+27
2022-12-12
RISC-V: Add some comments about the shadow and overflow stacks
Palmer Dabbelt
1
-7
/
+13
2022-12-12
RISC-V: Align the shadow stack
Palmer Dabbelt
1
-1
/
+1
2022-11-30
riscv: fix race when vmap stack overflow
Jisheng Zhang
1
-0
/
+18
2022-10-13
RISC-V: Avoid dereferening NULL regs in die()
Palmer Dabbelt
1
-3
/
+6
2022-08-19
riscv: traps: add missing prototype
Conor Dooley
1
-1
/
+2
2022-07-22
RISC-V: Add fast call path of crash_kexec()
Xianting Tian
1
-0
/
+4
2022-05-12
riscv: integrate alternatives better into the main architecture
Heiko Stuebner
1
-1
/
+1
2021-12-13
exit: Add and use make_task_dead.
Eric W. Biederman
1
-1
/
+1
2021-09-08
trap: cleanup trap_init()
Kefeng Wang
1
-5
/
+0
2021-07-09
Merge tag 'riscv-for-linus-5.14-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
1
-0
/
+35
2021-07-06
riscv: add VMAP_STACK overflow detection
Tong Tiangen
1
-0
/
+35
2021-06-11
riscv: xip: support runtime trap patching
Vitaly Wool
1
-4
/
+9
2021-05-06
riscv: remove unused handle_exception symbol
Rouven Czerwinski
1
-2
/
+0
2021-05-06
Merge tag 'riscv-for-linus-5.13-mw0' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
1
-1
/
+1
2021-04-26
riscv: add __init section marker to some functions
Jisheng Zhang
1
-1
/
+1
2021-04-16
riscv: add do_page_fault and do_trap_break into the kprobes blacklist
Jisheng Zhang
1
-0
/
+1
2021-03-10
riscv: traps: Fix no prototype warnings
Nanyong Sun
1
-0
/
+1
2021-01-15
riscv: Add dump stack in show_regs
Kefeng Wang
1
-1
/
+2
2021-01-15
riscv: Add uprobes supported
Guo Ren
1
-0
/
+10
2021-01-15
riscv: Add kprobes supported
Guo Ren
1
-0
/
+9
2020-07-30
RISC-V: Setup exception vector early
Atish Patra
1
-7
/
+1
2020-06-18
maccess: rename probe_kernel_address to get_kernel_nofault
Christoph Hellwig
1
-2
/
+2
2020-06-10
irqchip: RISC-V per-HART local interrupt controller driver
Anup Patel
1
-2
/
+0
2020-05-18
riscv: Add KGDB support
Vincent Chen
1
-0
/
+5
2020-04-09
Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...
Linus Torvalds
1
-5
/
+27
2020-04-03
riscv: Unaligned load/store handling for M_MODE
Damien Le Moal
1
-3
/
+24
2020-03-31
RISC-V: Add supported for ordered booting method using HSM
Atish Patra
1
-1
/
+1
2020-03-26
riscv: add macro to get instruction length
Zong Li
1
-1
/
+2
2020-03-16
irqchip/sifive-plic: Enable/Disable external interrupts upon cpu online/offline
Atish Patra
1
-1
/
+1
2020-02-18
RISC-V: Don't enable all interrupts in trap_init()
Anup Patel
1
-2
/
+2
2019-11-05
riscv: abstract out CSR names for supervisor vs machine mode
Christoph Hellwig
1
-8
/
+8
2019-10-28
riscv: for C functions called only from assembly, mark with __visible
Paul Walmsley
1
-2
/
+2
2019-10-28
riscv: add missing header file includes
Paul Walmsley
1
-0
/
+1
2019-10-26
riscv: cleanup do_trap_break
Christoph Hellwig
1
-20
/
+6
2019-10-14
riscv: remove the switch statement in do_trap_break()
Vincent Chen
1
-11
/
+11
2019-10-07
riscv: Correct the handling of unexpected ebreak in do_trap_break()
Vincent Chen
1
-3
/
+3
2019-10-07
riscv: avoid sending a SIGTRAP to a user thread trapped in WARN()
Vincent Chen
1
-1
/
+1
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