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2018-08-15Merge tag 'kconfig-v4.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/...Linus Torvalds2-71/+37
2018-08-15Merge tag 'kbuild-v4.19' of git://git.kernel.org/pub/scm/linux/kernel/git/mas...Linus Torvalds1-1/+0
2018-08-02kconfig: include kernel/Kconfig.preempt from init/KconfigChristoph Hellwig1-2/+0
2018-08-02Kconfig: consolidate the "Kernel hacking" menuChristoph Hellwig2-45/+37
2018-08-02kconfig: include common Kconfig files from top-level KconfigChristoph Hellwig1-24/+0
2018-07-25locking/atomics: Rework ordering barriersMark Rutland1-12/+5
2018-07-19kbuild: remove redundant LDFLAGS clearing in arch/*/MakefileMasahiro Yamada1-1/+0
2018-07-17Merge tag 'v4.18-rc5' into locking/core, to pick up fixesIngo Molnar7-25/+24
2018-07-05RISC-V: Fix the rv32i kernel buildPalmer Dabbelt4-13/+21
2018-07-05RISC-V: Fix PTRACE_SETREGSET bug.Jim Wilson1-1/+1
2018-07-05RISC-V: Don't include irq-riscv-intc.hPalmer Dabbelt1-4/+0
2018-07-05riscv: remove unnecessary of_platform_populate callRob Herring1-5/+0
2018-07-05RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocationsAndreas Schwab1-2/+2
2018-07-04RISC-V: Change variable type for 32-bit compatibleZong Li1-11/+11
2018-07-04RISC-V: Add definiion of extract symbol's index and type for 32-bitZong Li1-2/+7
2018-07-04RISC-V: Select GENERIC_UCMPDI2 on RV32IZong Li1-0/+1
2018-07-04RISC-V: Add conditional macro for zone of DMA32Zong Li1-0/+2
2018-06-21atomics/treewide: Make unconditional inc/dec ops optionalMark Rutland1-76/+0
2018-06-21atomics/treewide: Make test ops optionalMark Rutland1-46/+0
2018-06-21atomics/riscv: Define atomic64_fetch_add_unless()Mark Rutland1-6/+2
2018-06-21atomics/treewide: Make atomic_fetch_add_unless() optionalMark Rutland1-0/+1
2018-06-21atomics/treewide: Make atomic64_inc_not_zero() optionalMark Rutland1-7/+0
2018-06-21atomics/treewide: Remove redundant atomic_inc_not_zero() definitionsMark Rutland1-9/+0
2018-06-21atomics/treewide: Rename __atomic_add_unless() => atomic_fetch_add_unless()Mark Rutland1-2/+2
2018-06-16Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds15-14/+626
2018-06-12Merge tag 'mips_4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/l...Linus Torvalds1-3/+3
2018-06-11RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfigPalmer Dabbelt1-0/+1
2018-06-11RISC-V: Make our port sparse-cleanPalmer Dabbelt6-9/+14
2018-06-11RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab1-0/+12
2018-06-11riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't setAlan Kao1-1/+1
2018-06-11riscv: add riscv-specific predefines to CHECKFLAGSLuc Van Oostenryck1-0/+3
2018-06-09riscv: split the declaration of __copy_userLuc Van Oostenryck3-6/+11
2018-06-08Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-1/+0
2018-06-08mm: introduce ARCH_HAS_PTE_SPECIALLaurent Dufour2-3/+1
2018-06-07riscv: no __user for probe_kernel_address()Luc Van Oostenryck1-1/+1
2018-06-07riscv: use NULL instead of a plain 0Luc Van Oostenryck2-2/+2
2018-06-05Merge branch 'siginfo-linus' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds1-14/+2
2018-06-05RISC-V: Preliminary Perf SupportPalmer Dabbelt5-0/+586
2018-06-05perf: riscv: preliminary RISC-V supportAlan Kao5-0/+586
2018-06-04riscv: Fix the bug in memory access fixup codeAlan Kao1-4/+9
2018-05-19riscv: add swiotlb supportChristoph Hellwig3-0/+18
2018-05-19riscv: only enable ZONE_DMA32 for 64-bitChristoph Hellwig1-1/+1
2018-05-19riscv: simplify Kconfig magic for 32-bit vs 64-bit kernelsChristoph Hellwig1-25/+6
2018-05-17drivers: base: cacheinfo: setup DT cache properties earlyJeremy Linton1-1/+0
2018-05-09arch: define the ARCH_DMA_ADDR_T_64BIT config symbol in lib/KconfigChristoph Hellwig1-3/+0
2018-05-09arch: remove the ARCH_PHYS_ADDR_T_64BIT config symbolChristoph Hellwig1-4/+2
2018-05-08dma-debug: remove CONFIG_HAVE_DMA_API_DEBUGChristoph Hellwig1-1/+0
2018-05-07PCI: remove PCI_DMA_BUS_IS_PHYSChristoph Hellwig1-3/+0
2018-04-25signal/riscv: Replace do_trap_siginfo with force_sig_faultEric W. Biederman1-8/+2
2018-04-25signal/riscv: Use force_sig_fault where appropriateEric W. Biederman1-8/+1