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path: root/arch/x86/kernel/cpu/cacheinfo.c
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2024-03-12Merge tag 'x86_mtrr_for_v6.9_rc1' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-3/+4
2024-02-20x86/pat: Simplify the PAT programming protocolKirill A. Shutemov1-3/+4
2024-02-16x86/cpu/topology: Get rid of cpuinfo::x86_max_coresThomas Gleixner1-1/+1
2024-02-16x86/cpu: Provide an AMD/HYGON specific topology parserThomas Gleixner1-2/+2
2024-02-16x86/cpu/amd: Provide a separate accessor for Node IDThomas Gleixner1-1/+1
2023-10-10x86/cpu: Move cpu_l[l2]c_id into topology infoThomas Gleixner1-21/+12
2023-10-10x86/cpu: Move cpu_die_id into topology infoThomas Gleixner1-1/+1
2023-10-10x86/cpu: Move phys_proc_id into topology infoThomas Gleixner1-2/+2
2023-10-10x86/cpu: Encapsulate topology information in cpuinfo_x86Thomas Gleixner1-10/+10
2023-05-15x86/cpu/cacheinfo: Remove cpu_callout_mask dependencyThomas Gleixner1-4/+17
2023-02-11x86/cacheinfo: Remove unused trace variableBorislav Petkov (AMD)1-4/+1
2022-11-10x86/cacheinfo: Switch cache_ap_init() to hotplug callbackJuergen Gross1-3/+15
2022-11-10x86: Decouple PAT and MTRR handlingJuergen Gross1-1/+2
2022-11-10x86/mtrr: Add a stop_machine() handler calling only cache_cpu_init()Juergen Gross1-1/+58
2022-11-10x86/mtrr: Let cache_aps_delayed_init replace mtrr_aps_delayed_initJuergen Gross1-0/+12
2022-11-10x86/mtrr: Disentangle MTRR init from PAT initJuergen Gross1-0/+17
2022-11-10x86/mtrr: Move cache control code to cacheinfo.cJuergen Gross1-0/+77
2022-11-10x86/mtrr: Replace use_intel() with a local flagJuergen Gross1-0/+3
2022-07-18x86/cacheinfo: move shared cache map definitionsSander Vanheule1-0/+6
2021-10-15sched: Add cluster scheduler level for x86Tim Chen1-0/+1
2021-09-01drivers: base: cacheinfo: Get rid of DEFINE_SMP_CALL_CACHE_FUNCTION()Thomas Gleixner1-5/+2
2021-04-07x86/cacheinfo: Remove unneeded dead-store initializationYang Li1-1/+1
2020-11-19x86/CPU/AMD: Remove amd_get_nb_id()Yazen Ghannam1-1/+1
2020-11-19x86/CPU/AMD: Save AMD NodeId as cpu_die_idYazen Ghannam1-3/+3
2020-08-24treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva1-1/+1
2019-06-19x86/cacheinfo: Fix a -Wtype-limits warningQian Cai1-2/+1
2019-01-26x86/kernel: Mark expected switch-case fall-throughsGustavo A. R. Silva1-0/+1
2018-12-08x86/kernel: Fix more -Wmissing-prototypes warningsBorislav Petkov1-0/+1
2018-09-27x86/cpu: Get cache info and setup cache cpumap for Hygon DhyanaPu Wen1-2/+29
2018-06-22x86/CPU/AMD: Fix LLC ID bit-shift calculationSuravee Suthikulpanit1-1/+1
2018-05-13x86/CPU: Move cpu_detect_cache_sizes() into init_intel_cacheinfo()David Wang1-2/+3
2018-05-13x86/CPU: Move cpu local function declarations to local headerThomas Gleixner1-0/+2
2018-05-06x86/CPU/AMD: Calculate last level cache ID from number of sharing threadsSuravee Suthikulpanit1-0/+39
2018-05-06x86/CPU: Rename intel_cacheinfo.c to cacheinfo.cBorislav Petkov1-0/+968
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