index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
clk
/
clk-gate.c
Age
Commit message (
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)
Author
Files
Lines
2019-05-07
Merge branch 'clk-ti' into clk-next
Stephen Boyd
1
-1
/
+1
2019-04-26
clk: Remove CLK_IS_BASIC clk flag
Stephen Boyd
1
-1
/
+1
2019-04-23
clk: core: replace clk_{readl,writel} with {readl,writel}
Jonas Gorski
1
-2
/
+2
2019-04-23
clk: gate: add explicit big endian support
Jonas Gorski
1
-3
/
+19
2018-12-11
clk: Tag basic clk types with SPDX
Stephen Boyd
1
-4
/
+1
2017-09-01
clk: gate: expose clk_gate_ops::is_enabled
Gabriel Fernandez
1
-1
/
+2
2016-11-09
clk: gate: fix coding style
Uwe Kleine-König
1
-2
/
+2
2016-04-20
clk: gate: Add hw based registration APIs
Stephen Boyd
1
-7
/
+36
2016-01-29
clk: move the common clock's to_clk_*(_hw) macros to clk-provider.h
Geliang Tang
1
-2
/
+0
2015-07-28
clk: basic-type: Silence warnings about lock imbalances
Stephen Boyd
1
-0
/
+4
2015-05-15
clk: basic-types: Remove useless allocation failure printks
Stephen Boyd
1
-4
/
+2
2015-01-20
clk-gate: fix bit # check in clk_register_gate()
Sergei Shtylyov
1
-1
/
+1
2015-01-18
clk: Add clk_unregister_{divider, gate, mux} to close memory leak
Krzysztof Kozlowski
1
-0
/
+16
2014-09-28
clk: use uninitialized_var instead setting 'flags' to 0 directly.
Xiubo Li
1
-1
/
+1
2013-08-28
clk: wrap I/O access for improved portability
Gerhard Sittig
1
-3
/
+3
2013-08-16
clk: export fixed-factor, gate & mux registration
Mike Turquette
1
-0
/
+1
2013-06-16
clk: gate: add CLK_GATE_HIWORD_MASK
Haojian Zhuang
1
-6
/
+19
2012-07-12
clk: Add CLK_IS_BASIC flag to identify basic clocks
Rajendra Nayak
1
-1
/
+1
2012-05-02
clk: Use a separate struct for holding init data.
Saravana Kannan
1
-6
/
+9
2012-04-25
clk: clk-gate: Create clk_gate_endisable()
Viresh Kumar
1
-29
/
+25
2012-04-25
clk: basic: improve parent_names & return errors
Mike Turquette
1
-15
/
+19
2012-04-25
clk: add "const" for clk_ops of basic clks
Shawn Guo
1
-1
/
+1
2012-04-25
clk: remove unnecessary EXPORT_SYMBOL_GPL
Shawn Guo
1
-3
/
+0
2012-03-17
clk: basic clock hardware types
Mike Turquette
1
-0
/
+150