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path: root/drivers/clk/mediatek
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2019-07-17Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds5-24/+72
2019-07-12Merge branches 'clk-debugfs', 'clk-unused', 'clk-refactor' and 'clk-qoriq' in...Stephen Boyd1-5/+0
2019-06-07clk: mediatek: mt8516: Remove unused variablePhilippe Mazenauer1-5/+0
2019-06-07clk: mediatek: Remove MT8183 unused clockErin Lo1-19/+0
2019-06-07clk: mediatek: add audsys clock driver for MT8516Fabien Parent3-0/+72
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 174Thomas Gleixner35-315/+35
2019-05-21treewide: Add SPDX license identifier - Makefile/KconfigThomas Gleixner1-0/+1
2019-05-07Merge branches 'clk-renesas', 'clk-qcom', 'clk-mtk', 'clk-milbeaut' and 'clk-...Stephen Boyd20-33/+3392
2019-04-26clk: mediatek: add clock driver for MT8516Fabien Parent3-0/+824
2019-04-12clk: mediatek: fix clk-gate flag settingWeiyi Lu1-2/+1
2019-04-11clk: mediatek: Allow changing PLL rate when it is offJames Liao1-11/+2
2019-04-11clk: mediatek: Add MT8183 clock supportWeiyi Lu15-0/+2196
2019-04-11clk: mediatek: Add configurable pcw_chg_reg to mtk_pll_dataWeiyi Lu2-6/+12
2019-04-11clk: mediatek: Add configurable pcwibits and fmin to mtk_pll_dataOwen Chen2-4/+13
2019-04-11clk: mediatek: Add new clkmux register APIOwen Chen3-1/+314
2019-04-11clk: mediatek: Disable tuner_en before change PLL rateOwen Chen1-14/+34
2019-03-08Merge branches 'clk-typo', 'clk-json-schema', 'clk-mtk-2712-eco' and 'clk-roc...Stephen Boyd1-2/+6
2019-03-08Merge branches 'clk-ingenic', 'clk-mtk-mux', 'clk-qcom-sdm845-pcie', 'clk-mtk...Stephen Boyd7-41/+75
2019-02-26clk: mediatek: correct cpu clock name for MT8173 SoCSeiya Wang1-2/+2
2019-02-26clk: mediatek: Mark bus and DRAM related clocks as criticalJasper Mattsson1-25/+43
2019-02-26clk: mediatek: Add flags to mtk_gateJasper Mattsson4-3/+7
2019-02-26clk: mediatek: Add MUX_FLAGS macroJasper Mattsson1-2/+6
2019-02-25clk: mediatek: using CLK_MUX_ROUND_CLOSEST for the clock of dpi1_selchunhui dai1-2/+2
2019-02-25clk: mediatek: add MUX_GATE_FLAGS_2chunhui dai2-7/+15
2019-02-22clk: mediatek: fix platform_no_drv_owner.cocci warningsYueHaibing1-1/+0
2019-02-06clk: mediatek: update clock driver of MT2712Weiyi Lu1-2/+6
2018-12-05clk: mediatek: fix the PCIe MAC clock parentRyder Lee1-2/+2
2018-11-30clk: mediatek: Drop more __init markings for driver probeStephen Boyd1-2/+2
2018-11-30clk: mediatek: Drop __init from mtk_clk_register_cpumuxes()Stephen Boyd1-4/+4
2018-11-30clk: mediatek: add clock support for MT7629 SoCRyder Lee5-0/+1064
2018-08-31clk: mediatek: remove unused array audio_parentsColin Ian King1-5/+0
2018-06-04Merge branches 'clk-hisi-usb', 'clk-silent-bulk', 'clk-mtk-hdmi', 'clk-mtk-ma...Stephen Boyd4-2/+108
2018-05-16clk: mediatek: add g3dsys support for MT2701 and MT7623Sean Wang3-0/+102
2018-05-16clk: mediatek: correct the clocks for MT2701 HDMI PHY moduleRyder Lee1-2/+6
2018-04-06Merge branches 'clk-mediatek', 'clk-hisi', 'clk-allwinner', 'clk-ux500' and '...Stephen Boyd5-8/+215
2018-03-20clk: mediatek: add audsys support for MT2701Ryder Lee3-0/+193
2018-03-20clk: mediatek: add devm_of_platform_populate() for MT7622 audsysRyder Lee1-1/+13
2018-03-20clk: mediatek: update clock driver of MT2712Weiyi Lu1-14/+55
2018-03-19clk: mediatek: update missing clock data for MT7622 audsysRyder Lee1-0/+1
2018-03-19clk: mediatek: fix PWM clock source by adding a fixed-factor clockSean Wang1-7/+8
2018-01-11clk: mediatek: adjust dependency of reset.c to avoid unexpectedly being builtSean Wang3-9/+2
2017-12-27clk: mediatek: Fix all warnings for missing struct clk_onecell_dataSean Wang1-0/+1
2017-12-22clk: mediatek: group drivers under indpendent menuSean Wang1-46/+50
2017-11-18Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds17-4/+3520
2017-11-02License cleanup: add SPDX GPL-2.0 license identifier to files with no licenseGreg Kroah-Hartman1-0/+1
2017-11-02clk: mediatek: add clock support for MT7622 SoCSean Wang6-0/+1334
2017-11-02clk: mediatek: add the option for determining PLL source clockChen Zhong2-1/+5
2017-11-02clk: mediatek: mark mtk_infrasys_init_early __initArnd Bergmann1-1/+1
2017-11-02clk: mediatek: Add MT2712 clock supportweiyi.lu@mediatek.com12-2/+2180
2017-07-22clk: Convert to using %pOF instead of full_nameRob Herring3-3/+3