summaryrefslogtreecommitdiff
path: root/drivers/clk/renesas/r8a7745-cpg-mssr.c
AgeCommit message (Expand)AuthorFilesLines
2020-09-04clk: renesas: rcar-gen2: Rename vsp1-(sy|rt) clocks to vsp(s|r)Lad Prabhakar1-1/+1
2018-09-29clk: renesas: Convert to SPDX identifiersKuninori Morimoto1-4/+1
2018-04-16clk: renesas: r8a7745: Fix LB clock dividerGeert Uytterhoeven1-1/+1
2018-02-20clk: renesas: r8a7745: Add rwdt clockFabrizio Castro1-0/+2
2017-10-20clk: renesas: cpg-mssr: Add du1 clock to R8A7745Fabrizio Castro1-0/+1
2017-05-15clk: renesas: r8a7745: Remove PLL configs for MD19=0Geert Uytterhoeven1-11/+2
2017-05-15clk: renesas: r8a7745: Remove nonexisting scu-src[0789] clocksGeert Uytterhoeven1-4/+0
2016-11-10clk: renesas: cpg-mssr: Add R8A7745 supportSergei Shtylyov1-0/+259