starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2014-03-19	clk: socfpga: Fix section mismatch warning	Dinh Nguyen	1	-1/+1
2014-02-27	clk: socfpga: Support multiple parents for the pll clocks	Dinh Nguyen	1	-4/+22
2014-02-27	clk: socfpga: Fix integer overflow in clock calculation	Dinh Nguyen	1	-3/+5
2014-02-19	clk: socfpga: Add a clk-phase property to the "altr,socfpga-gate-clk"	Dinh Nguyen	1	-0/+68
2014-02-19	clk: socfpga: split clk code	Steffen Trumtrar	6	-306/+462
2014-02-19	clk: socfpga: fix define typo	Steffen Trumtrar	1	-3/+3
2014-02-19	clk: socfpga: remove unused field	Steffen Trumtrar	1	-1/+0
2014-02-19	clk: socfpga: Remove socfpga_init_clocks	Dinh Nguyen	1	-10/+0
2014-02-19	clk: socfpga: Look for the GPIO_DB_CLK by its offset	Dinh Nguyen	1	-2/+3
2014-02-19	clk: socfpga: Map the clk manager base address in the clock driver	Dinh Nguyen	1	-4/+16
2013-12-20	clk: socfpga: Use NULL instead of 0	Sachin Kamat	1	-1/+1
2013-11-28	clk: socfpga: Remove check for "reg" property in socfpga_clk_init	Dinh Nguyen	1	-3/+1
2013-10-08	clk: socfpga: Fix incorrect sdmmc clock name	Dinh Nguyen	1	-1/+1
2013-06-12	ARM: socfpga: Add support to gate peripheral clocks	Dinh Nguyen	1	-9/+185
2013-04-15	ARM: socfpga: Upgrade clk driver for socfpga to make use of dts clock entries	Dinh Nguyen	1	-21/+142
2012-07-19	ARM: socfpga: initial support for Altera's SOCFPGA platform	Dinh Nguyen	2	-0/+52