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path: root/drivers/clk/sunxi-ng/ccu_mp.c
AgeCommit message (Expand)AuthorFilesLines
2023-01-08clk: sunxi-ng: Avoid computing the rate twiceSamuel Holland1-5/+6
2021-11-22clk: sunxi-ng: Export symbols used by CCU driversSamuel Holland1-0/+2
2021-02-12clk: sunxi-ng: mp: fix parent rate change flag checkJernej Skrabec1-1/+1
2019-05-30treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152Thomas Gleixner1-5/+1
2019-05-15clk: Remove io.h from clk-provider.hStephen Boyd1-0/+1
2018-11-05clk: sunxi-ng: Adjust MP clock parent rate when allowedJernej Skrabec1-2/+62
2017-12-07clk: sunxi-ng: Support fixed post-dividers on MP style clocksChen-Yu Tsai1-2/+18
2017-08-30clk: sunxi-ng: Add MP_MMC clocks that support MMC timing modes switchingChen-Yu Tsai1-0/+80
2017-06-07clk: sunxi-ng: mux: Change pre-divider application function prototypeMaxime Ripard1-4/+4
2017-06-07clk: sunxi-ng: Pass the parent and a pointer to the clocks round rateMaxime Ripard1-3/+4
2017-03-06clk: sunxi-ng: mp: Adjust parent rate for pre-dividersChen-Yu Tsai1-0/+8
2017-01-23clk: sunxi-ng: Implement factors offsetsMaxime Ripard1-3/+7
2016-09-10clk: sunxi-ng: div: Allow to set a maximumMaxime Ripard1-10/+13
2016-07-09clk: sunxi-ng: Add M-P factor clock supportMaxime Ripard1-0/+158