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path: root/drivers/clk/tegra
AgeCommit message (Expand)AuthorFilesLines
2015-02-18clk: Replace explicit clk assignment with __clk_hw_set_clkJavier Martinez Canillas1-7/+7
2015-02-02clk: tegra: Define PLLD_DSI and remove dsia(b)_muxMark Zhang4-26/+24
2015-02-02clk: tegra: Add support for the Tegra132 CAR IP blockPaul Walmsley3-12/+129
2015-02-02clk: tegra: make tegra_clocks_apply_init_table() arch_initcallPeter De Schrijver1-2/+5
2015-02-02clk: tegra: Fix order of arguments in WARNTomeu Vizoso1-4/+4
2015-02-02clk: tegra124: Add init data for dsi lp clocksSean Paul1-0/+2
2015-02-02clk: tegra: SDMMC controllers are on APBAndrew Bresticker1-8/+8
2014-11-26clk: tegra: Implement memory-controller clockThierry Reding6-4/+40
2014-09-18clk: tegra: Make clock initialization more robustTomeu Vizoso1-2/+7
2014-09-18clk: tegra124: Add PLL_M_UD and PLL_C_UD clocksMikko Perttunen1-0/+8
2014-08-08Merge tag 'cleanup-for-3.17' of git://git.kernel.org/pub/scm/linux/kernel/git...Linus Torvalds3-3/+8
2014-07-17ARM: tegra: Convert PMC to a driverThierry Reding1-1/+1
2014-07-17ARM: tegra: Move includes to include/soc/tegraThierry Reding3-3/+8
2014-07-08clk: tegra: Use XUSB-compatible SATA PLL sequenceMikko Perttunen1-0/+11
2014-06-30clk: tegra: export clock names for debuggingPeter De Schrijver1-0/+6
2014-06-27clk: tegra124: init table updatesPeter De Schrijver1-0/+6
2014-06-25clk: tegra: Add SATA clocks to Tegra124 initialization tableMikko Perttunen1-0/+2
2014-06-25clk: tegra: Enable hardware control of SATA PLLMikko Perttunen1-0/+8
2014-06-25clk: tegra: fix vi_sensor clocks on Tegra124Peter De Schrijver3-4/+33
2014-05-28Merge branch 'clk-fixes' into clk-nextMike Turquette1-21/+43
2014-05-28Merge tag 'clk-tegra-fixes-3.15' of git://nv-tegra.nvidia.com/user/pdeschrijv...Mike Turquette1-21/+43
2014-05-23clk: tegra: Initialize xusb clocksAndrew Bresticker2-1/+12
2014-05-23clk: tegra: Fix xusb_hs_src clock hierarchyAndrew Bresticker4-20/+17
2014-05-23clk: tegra: Fix xusb_fs_src muxJim Lin1-1/+3
2014-05-23clk: tegra: Enable hardware control of PLLEJim Lin1-1/+32
2014-05-17clk: tegra: Fix wrong value written to PLLE_AUXTuomas Tynkkynen1-1/+1
2014-04-24clk: tegra: remove non-existent clocksStephen Warren1-3/+0
2014-04-17clk: tegra: Fix enabling of PLLEThierry Reding1-1/+1
2014-04-17clk: tegra: Introduce divider mask and shift helpersThierry Reding1-20/+24
2014-04-17clk: tegra: Fix PLLE programmingThierry Reding1-6/+24
2014-02-25Merge branch 'clk-fixes' into clk-nextMike Turquette7-31/+45
2014-02-24clk: tegra: Staticize tegra_clk_periph_no_gate_opsSachin Kamat1-1/+1
2014-02-20clk: tegra124: remove gr2d and gr3d clocksPeter De Schrijver1-2/+0
2014-02-20clk: tegra: Fix vic03 mux indexPeter De Schrijver1-3/+1
2014-02-17clk: tegra: use max divider if divider overflowsAndrew Bresticker1-1/+1
2014-02-17clk: tegra: cclk_lp has a pllx/2 dividerAndrew Bresticker1-1/+1
2014-02-17clk: tegra: fix sdmmc clks on Tegra1x4Andrew Bresticker4-8/+16
2014-02-17clk: tegra: fix host1x clock on Tegra124Mark Zhang1-1/+1
2014-02-17clk: tegra: PLLD2 fixes for hdmiDavid Ung1-8/+7
2014-02-17clk: tegra: Fix PLLD mnp tableRhyland Klein1-1/+10
2014-02-17clk: tegra: Fix PLLP rate tableGabe Black1-5/+5
2014-02-17clk: tegra: Correct clock number for UARTEThierry Reding1-1/+1
2014-02-17clk: tegra: Add missing Tegra20 fuse clksPeter De Schrijver1-0/+2
2014-01-24Merge tag 'clk-for-linus-3.14-part1' of git://git.linaro.org/people/mike.turq...Linus Torvalds2-7/+7
2013-12-20clk: tegra: Staticize tegra_clk_periph_nodiv_opsSachin Kamat1-1/+1
2013-12-20clk: tegra: Staticize local variables in clk-pll.cSachin Kamat1-6/+6
2013-12-12clk: tegra: remove bogus PCIE_XCLKStephen Warren2-13/+0
2013-12-12clk: tegra: remove legacy reset APIsStephen Warren3-63/+0
2013-12-12clk: tegra: implement a reset driverStephen Warren6-6/+57
2013-11-28clk: tegra: fix __clk_lookup() return value checksWei Yongjun1-4/+4