index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
gpu
/
drm
/
amd
/
display
/
amdgpu_dm
/
dc_fpu.c
Age
Commit message (
Expand
)
Author
Files
Lines
2023-10-09
drm/amd/display: Add a warning if the FPU is used outside from task context.
Sebastian Andrzej Siewior
1
-0
/
+1
2023-10-06
drm/amd/display: Simplify the per-CPU usage.
Sebastian Andrzej Siewior
1
-30
/
+20
2023-10-06
drm/amd/display: Remove migrate_en/dis from dc_fpu_begin().
Sebastian Andrzej Siewior
1
-2
/
+0
2023-06-09
drm/amdgpu/display: Enable DC_FP for LoongArch
Huacai Chen
1
-2
/
+4
2023-04-18
drm/amd/display: Disable migration to ensure consistency of per-CPU variable
Tianci Yin
1
-0
/
+2
2022-11-04
drm/amd/display: add DCN support for ARM64
Ao Zhong
1
-0
/
+6
2021-10-06
drm/amd/display: Re-arrange FPU code structure for dcn2x
Qingqing Zhuo
1
-1
/
+1
2021-09-16
drm/amd/display: dc_assert_fp_enabled assert only if FPU is not enabled
Anson Jacob
1
-1
/
+1
2021-08-06
drm/amd/display: Add DC_FP helper to check FPU state
Rodrigo Siqueira
1
-0
/
+19
2021-08-06
drm/amd/display: Add control mechanism for FPU utilization
Rodrigo Siqueira
1
-24
/
+53
2021-08-06
drm/amd/display: Add control mechanism for FPU
Rodrigo Siqueira
1
-0
/
+96