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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
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starfive-5.13
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visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
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visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
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tree
commit
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log msg
author
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path:
root
/
drivers
/
gpu
/
drm
/
amd
/
display
/
dc
/
dcn10
/
dcn10_stream_encoder.h
Age
Commit message (
Expand
)
Author
Files
Lines
2023-09-12
drm/amd/display: fix some non-initialized register mask and setting
Charlene Liu
1
-1
/
+4
2023-08-30
drm/amd/display: Update DCN10 for DCN35 support
Qingqing Zhuo
1
-2
/
+17
2022-07-05
drm/amd/display: Program ACP related register
Alan Liu
1
-14
/
+2
2022-07-05
drm/amd/display: Add function to set pixels per cycle
Eric Bernstein
1
-0
/
+1
2022-06-03
drm/amd/display: add new pixel rate programming
Jun Lei
1
-0
/
+1
2022-06-03
drm/amd/display: Fix USBC link creation
Dillon Varone
1
-0
/
+3
2022-06-03
drm/amd/display: Add dependant changes for DCN32/321
Aurabindo Pillai
1
-0
/
+25
2022-04-26
drm/amd/display: Add Audio readback registers
Ilya Bakoulin
1
-0
/
+8
2022-02-03
drm/amd/display: revert "Reset fifo after enable otg"
Zhan Liu
1
-3
/
+0
2021-11-22
drm/amd/display: Reset fifo after enable otg
Xu, Jinze
1
-0
/
+3
2021-09-14
drm/amd/display: Add DPCD writes at key points
Leo (Hanghong) Ma
1
-0
/
+2
2021-06-16
drm/amd/display: Add interface to get Calibrated Avg Level from FIFO
Wesley Chalmers
1
-0
/
+24
2020-12-15
drm/amd/display: Add missing DP_SEC register definitions and masks
Max Tseng
1
-0
/
+6
2020-11-05
drm/amdgpu: fold CONFIG_DRM_AMD_DC_DCN3* into CONFIG_DRM_AMD_DC_DCN (v3)
Alex Deucher
1
-8
/
+0
2020-09-16
drm/amd/display: Rename set_mst_bandwidth to align with DP spec
George Shen
1
-1
/
+1
2020-08-11
drm/amd/display: Switch to immediate mode for updating infopackets
Anthony Koo
1
-0
/
+14
2020-07-01
drm/amd/display: Add DCN3 DIO
Bhawanpreet Lakha
1
-0
/
+42
2019-11-13
drm/amd/display: Drop CONFIG_DRM_AMD_DC_DCN2_0 and DSC_SUPPORTED
Bhawanpreet Lakha
1
-8
/
+0
2019-11-13
drm/amd/display: set MSA MISC1 bit 6 while sending colorimetry in VSC SDP
Anthony Koo
1
-0
/
+1
2019-10-11
drm/amd/display: add more checks to validate seamless boot timing
Martin Leung
1
-0
/
+5
2019-08-15
drm/amd/display: enabling seamless boot sequence for dcn2
Martin Leung
1
-0
/
+3
2019-08-15
drm/amd/display: reset hdmi tmds rate and data scramble on pipe reset
Wenjing Liu
1
-0
/
+3
2019-07-18
drm/amd/display: Add DIG_CLOCK_PATTERN register
Nevenko Stupar
1
-3
/
+7
2019-07-18
drm/amd/display: Do not fill Null packet in the blank period
Charlene Liu
1
-0
/
+2
2019-07-18
drm/amd/display:Use Pixel clock in 100Hz units for HDMI Audio wall clock DTO
Nevenko Stupar
1
-2
/
+2
2019-06-22
drm/amd/display: Add DCN2 DIO
Harry Wentland
1
-0
/
+40
2019-05-31
drm/amd/display: Refactor DIO stream encoder
Eric Bernstein
1
-0
/
+17
2019-05-24
drm/amd/display: Expose send immediate sdp message interface
Leo (Hanghong) Ma
1
-0
/
+22
2019-03-28
drm/amd/display: Pass SDP spliting in parameters
Nikola Cornij
1
-1
/
+2
2019-01-26
drm/amd/display: Connect dig_fe to otg directly instead of calling bios
hersen wu
1
-2
/
+8
2018-08-27
drm/amd/display: Define registers for dcn10
Nikola Cornij
1
-0
/
+2
2018-04-11
drm/amd/display: Make DCN stream encoder shareable
Eric Bernstein
1
-353
/
+293
2018-04-11
drm/amd/display: Refactor stream encoder for HW review
Eric Bernstein
1
-0
/
+584