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path: root/drivers/gpu/drm/i915/display/intel_cx0_phy_regs.h
AgeCommit message (Expand)AuthorFilesLines
2024-01-30drm/i915/xe2lpd: Move registers to PICALucas De Marchi1-8/+55
2023-09-18drm/i915/cx0: Add step for programming msgbus timerGustavo Sousa1-1/+1
2023-09-06drm/i915/cx0: Check and increase msgbus timeout thresholdGustavo Sousa1-0/+13
2023-05-19drm/i915/hdmi: C20 computed PLL frequenciesClint Taylor1-0/+53
2023-04-29drm/i915/mtl: Add voltage swing sequence for C20Mika Kahola1-0/+4
2023-04-29drm/i915/mtl: C20 port clock calculationMika Kahola1-0/+3
2023-04-29drm/i915/mtl: C20 HW readoutMika Kahola1-0/+1
2023-04-29drm/i915/mtl: C20 PLL programmingMika Kahola1-0/+33
2023-04-14drm/i915/mtl: Add C10 phy programming for HDMIRadhakrishna Sripada1-0/+2
2023-04-14drm/i915/mtl/display: Implement DisplayPort sequencesJosé Roberto de Souza1-0/+8
2023-04-14drm/i915/mtl: Add vswing programming for C10 physMika Kahola1-3/+11
2023-04-14drm/i915/mtl: Add Support for C10 PHY message bus and pll programmingRadhakrishna Sripada1-9/+38
2023-04-14drm/i915/mtl: Create separate reg file for PICA registersMika Kahola1-0/+133