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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
drivers
/
gpu
/
drm
/
i915
/
i915_reg.h
Age
Commit message (
Expand
)
Author
Files
Lines
2012-12-17
drm/i915: Implement WaSetupGtModeTdRowDispatch
Daniel Vetter
1
-1
/
+2
2012-12-17
drm/i915: Implement WaDisableHiZPlanesWhenMSAAEnabled
Daniel Vetter
1
-0
/
+1
2012-12-10
drm/i915: set the LPT FDI RX polarity reversal bit when needed
Paulo Zanoni
1
-0
/
+1
2012-12-10
drm/i915: add lpt_init_pch_refclk
Paulo Zanoni
1
-1
/
+5
2012-12-10
drm/i915: add support for mPHY destination on intel_sbi_{read, write}
Paulo Zanoni
1
-0
/
+4
2012-11-21
drm/i915: make the panel fitter work on pipes B and C on IVB
Paulo Zanoni
1
-0
/
+2
2012-11-21
drm/i915: don't intel_crt_init if DDI A has 4 lanes
Paulo Zanoni
1
-0
/
+1
2012-11-21
drm/i915: make DP work on LPT-LP machines
Paulo Zanoni
1
-0
/
+1
2012-11-12
drm/i915: Move the remaining gtt code
Ben Widawsky
1
-17
/
+0
2012-11-12
drm/i915: flush system agent TLBs on SNB
Ben Widawsky
1
-0
/
+2
2012-11-12
drm/i915: Calculate correct stolen size for GEN7+
Ben Widawsky
1
-0
/
+2
2012-11-12
drm/i915: Stop using AGP layer for GEN6+
Ben Widawsky
1
-0
/
+6
2012-11-12
drm/i915: TLB invalidation with MI_FLUSH_DW requires a post-sync op v3
Jesse Barnes
1
-2
/
+6
2012-11-12
drm/i915: implement WaDisablePSDDualDispatchEnable on IVB & VLV
Jesse Barnes
1
-0
/
+5
2012-11-12
drm/i915: implement WaDisableVLVClockGating_VBIIssue on VLV
Jesse Barnes
1
-0
/
+2
2012-11-12
drm/i915: implement WaDisableDopClockGatingisable on VLV and IVB
Jesse Barnes
1
-0
/
+4
2012-11-12
drm/i915: implement WaDisableL3CacheAging on VLV
Jesse Barnes
1
-0
/
+1
2012-11-12
drm/i915: fix Haswell FDI link training code
Paulo Zanoni
1
-6
/
+11
2012-11-12
drm/i915: implement WADP0ClockGatingDisable
Daniel Vetter
1
-0
/
+4
2012-11-12
drm/i915: CPT+ pch transcoder workaround
Daniel Vetter
1
-2
/
+3
2012-11-12
drm/i915: Add SURFLIVE register definitions
Ville Syrjälä
1
-0
/
+7
2012-11-12
drm/i915: Fix display pixel format handling
Ville Syrjälä
1
-5
/
+12
2012-11-12
drm/i915: implement WaDisableRenderCachePipelinedFlush
Daniel Vetter
1
-0
/
+1
2012-11-12
drm/i915: Fix sprite offset on HSW
Damien Lespiau
1
-0
/
+3
2012-11-12
drm/i915: Fix primary plane offset on HSW
Damien Lespiau
1
-0
/
+3
2012-11-12
drm/i915: check fdi B/C lane sharing constraint
Daniel Vetter
1
-2
/
+3
2012-10-26
drm/i915: convert pipe timing definitions to transcoder
Paulo Zanoni
1
-7
/
+7
2012-10-26
drm/i915: convert CPU M/N timings to transcoder
Paulo Zanoni
1
-8
/
+8
2012-10-26
drm/i915: convert PIPE_MSA_MISC to transcoder
Paulo Zanoni
1
-9
/
+10
2012-10-26
drm/i915: convert PIPECONF to use transcoder instead of pipe
Paulo Zanoni
1
-1
/
+1
2012-10-26
drm/i915: convert DDI_FUNC_CTL to transcoder
Paulo Zanoni
1
-27
/
+32
2012-10-26
drm/i915: convert PIPE_CLK_SEL to transcoder
Paulo Zanoni
1
-7
/
+7
2012-10-26
drm/i915: add TRANSCODER_EDP
Paulo Zanoni
1
-0
/
+1
2012-10-23
drm/i915: make edp panel power sequence setup more robust
Daniel Vetter
1
-0
/
+5
2012-10-22
Merge tag 'v3.7-rc2' into drm-intel-next-queued
Daniel Vetter
1
-1
/
+8
2012-10-19
drm/i915: Consolidate ILK_DSPCLK_GATE and PCH_DSPCLK_GATE
Damien Lespiau
1
-15
/
+7
2012-10-18
drm/i915: add basic Haswell DP link train bits
Paulo Zanoni
1
-0
/
+4
2012-10-18
drm/i915: add intel_ddi_set_pipe_settings
Paulo Zanoni
1
-0
/
+10
2012-10-17
drm/i915: Document the multi-threaded FORCEWAKE bits
Chris Wilson
1
-0
/
+2
2012-10-17
drm/i915: Allow DRM_ROOT_ONLY|DRM_MASTER to submit privileged batchbuffers
Chris Wilson
1
-2
/
+5
2012-10-16
drm/i915: Workaround to bump rc6 voltage to 450
Ben Widawsky
1
-0
/
+4
2012-10-12
drm/i915: Set guardband clipping workaround bit in the right register.
Kenneth Graunke
1
-1
/
+1
2012-10-12
drm/i915: Fix the SCC/SSC typo in the SPLL bits definition
Damien Lespiau
1
-3
/
+3
2012-10-10
drm/i915: completely rewrite the Haswell PLL handling code
Paulo Zanoni
1
-0
/
+1
2012-10-10
drm/i915: add haswell_set_pipeconf
Paulo Zanoni
1
-0
/
+1
2012-10-10
drm/i915: enable and disable DDI_FUNC_CTL at the right time
Paulo Zanoni
1
-0
/
+1
2012-10-10
drm/i915: rewrite the LCPLL code
Paulo Zanoni
1
-0
/
+6
2012-10-04
drm/i915: implement WaDisableEarlyCull for VLV and IVB
Jesse Barnes
1
-0
/
+1
2012-10-04
drm/i915: implement WaForceL3Serialization on VLV and IVB
Jesse Barnes
1
-0
/
+3
2012-10-04
drm/i915: Fix GT_MODE default value
Ben Widawsky
1
-0
/
+3
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