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path: root/drivers/gpu/drm/tegra/dp.c
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2022-04-25drm: Rename dp/ to display/Thomas Zimmermann1-1/+1
Rename dp/ to display/ to account for additional display-related helpers, such as HDMI. Update all related include statements. No functional changes. Various drivers, such as i915 and amdgpu, use similar naming scheme by putting code for video-output standards into a local display/ directory. The new directory's name is aligned with this convention. v2: * update commit message (Javier) Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Reviewed-by: Lyude Paul <lyude@redhat.com> Reviewed-by: Javier Martinez Canillas <javierm@redhat.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Link: https://patchwork.freedesktop.org/patch/msgid/20220421073108.19226-3-tzimmermann@suse.de
2022-02-25drm/dp: Fix OOB read when handling Post Cursor2 registerKees Cook1-1/+10
The link_status array was not large enough to read the Adjust Request Post Cursor2 register, so remove the common helper function to avoid an OOB read, found with a -Warray-bounds build: drivers/gpu/drm/drm_dp_helper.c: In function 'drm_dp_get_adjust_request_post_cursor': drivers/gpu/drm/drm_dp_helper.c:59:27: error: array subscript 10 is outside array bounds of 'const u8[6]' {aka 'const unsigned char[6]'} [-Werror=array-bounds] 59 | return link_status[r - DP_LANE0_1_STATUS]; | ~~~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/drm_dp_helper.c:147:51: note: while referencing 'link_status' 147 | u8 drm_dp_get_adjust_request_post_cursor(const u8 link_status[DP_LINK_STATUS_SIZE], | ~~~~~~~~~^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Replace the only user of the helper with an open-coded fetch and decode, similar to drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c. Cc: Daniel Vetter <daniel@ffwll.ch> Cc: Maarten Lankhorst <maarten.lankhorst@linux.intel.com> Cc: Maxime Ripard <mripard@kernel.org> Cc: Thomas Zimmermann <tzimmermann@suse.de> Cc: David Airlie <airlied@linux.ie> Cc: dri-devel@lists.freedesktop.org Fixes: 79465e0ffeb9 ("drm/dp: Add helper to get post-cursor adjustments") Signed-off-by: Kees Cook <keescook@chromium.org> Reviewed-by: Gustavo A. R. Silva <gustavoars@kernel.org> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20220105173507.2420910-1-keescook@chromium.org Signed-off-by: Thierry Reding <treding@nvidia.com>
2022-01-17drm/dp: Move public DisplayPort headers into dp/Thomas Zimmermann1-1/+1
Move all public DisplayPort headers into dp/ and update users. No functional changes. v3: * rebased onto latest drm-tip Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de> Acked-by: Daniel Vetter <daniel@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20220114114535.29157-5-tzimmermann@suse.de
2019-10-28drm/tegra: sor: Add DisplayPort supportThierry Reding1-4/+6
Add support for regular DisplayPort on Tegra210 and Tegra186. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Add DisplayPort link training helperThierry Reding1-0/+456
Add a helper that will perform link training as described in the DisplayPort specification. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Add support for eDP link ratesThierry Reding1-0/+127
Parses additional link rates from DPCD if the sink supports eDP 1.4. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Add drm_dp_link_choose() helperThierry Reding1-0/+55
This helper chooses an appropriate configuration, according to the bitrate requirements of the video mode and the capabilities of the DisplayPort sink. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Enable alternate scrambler reset when supportedThierry Reding1-0/+7
If the sink is eDP and supports the alternate scrambler reset, enable it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Set channel coding on link configurationThierry Reding1-1/+10
Make use of ANSI 8B/10B channel coding if the DisplayPort sink supports it. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read AUX read interval from DPCDThierry Reding1-0/+31
Store the AUX read interval from DPCD, so that it can be used to wait for the durations given in the specification during link training. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read eDP version from DPCDThierry Reding1-2/+16
If the sink supports eDP, read the eDP revision from it's DPCD. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read alternate scrambler reset capability from sinkThierry Reding1-0/+5
Parse from the sink capabilities whether or not the eDP alternate scrambler reset value of 0xfffe is supported. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read channel coding capability from sinkThierry Reding1-0/+3
Parse from the sink capabilities whether or not it supports ANSI 8B/10B channel coding as specified in ANSI X3.230-1994, clause 11. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read TPS3 capability from sinkThierry Reding1-0/+3
The TPS3 capability can be exposed by DP 1.2 and later sinks if they support the alternative training pattern for channel equalization. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Read fast training capability from linkThierry Reding1-0/+3
While probing the DisplayPort link, query the fast training capability. If supported, drivers can use the fast link training sequence instead of the more involved full link training sequence. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Probe link using existing parsing helpersThierry Reding1-7/+6
Use existing parsing helpers to probe a DisplayPort link. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Turn link capabilities into booleansThierry Reding1-3/+15
Rather than storing capabilities as flags in an integer, use a separate boolean per capability. This simplifies the code that checks for these capabilities. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Track link capabilities alongside settingsThierry Reding1-5/+11
Store capabilities in max_* fields and add separate fields for the currently selected settings. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-28drm/tegra: dp: Add drm_dp_link_reset() implementationThierry Reding1-1/+12
Subsequent patches will add non-volatile fields to struct drm_dp_link, so introduce a function to zero out only the volatile fields. Signed-off-by: Thierry Reding <treding@nvidia.com>
2019-10-23drm/tegra: Move drm_dp_link helpers to Tegra DRMThierry Reding1-0/+133
During the discussion of patches that enhance the drm_dp_link helpers it was concluded that these helpers aren't very useful to begin with. After all other drivers have been converted not to use these helpers anymore, move these helpers into the last remaining user: Tegra DRM. If at some point these helpers are deemed more widely useful, they can be moved out into the DRM DP helpers again. Signed-off-by: Thierry Reding <treding@nvidia.com> Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch> Link: https://patchwork.freedesktop.org/patch/msgid/20191021143437.1477719-14-thierry.reding@gmail.com