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path: root/drivers/spi/spi-zynq-qspi.c
AgeCommit message (Expand)AuthorFilesLines
2019-11-08spi: zynq-qspi: Support two chip selectsMiquel Raynal1-8/+25
2019-11-08spi: zynq-qspi: Do the actual hardware initialization later in the probeMiquel Raynal1-3/+4
2019-11-08spi: zynq-qspi: Clarify the select chip functionMiquel Raynal1-11/+6
2019-11-08spi: zynq-qspi: Enhance the Linear CFG bit definitionsMiquel Raynal1-3/+3
2019-11-08spi: zynq-qspi: Keep the bitfields naming consistentMiquel Raynal1-6/+6
2019-11-08spi: zynq-qspi: Anything else than CS0 is not supported yetMiquel Raynal1-2/+6
2019-11-08spi: zynq-qspi: Keep the naming consistent across the driverMiquel Raynal1-5/+5
2019-10-30spi: zynq-qspi: Drop GPIO headerLinus Walleij1-1/+0
2019-09-04spi: zynq-qspi: use devm_platform_ioremap_resource() to simplify codeYueHaibing1-3/+1
2019-08-23Merge branch 'spi-5.3' into spi-5.4Mark Brown1-1/+1
2019-08-20spi: zynq-qspi: Fix missing spi_unregister_controller when unload moduleAxel Lin1-1/+1
2019-08-02spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd1-1/+0
2019-05-02spi: spi-mem: zynq-qspi: Fix build error on architectures missing readsl/writeslNaga Sureshkumar Relli1-4/+4
2019-04-05spi: spi-mem: Add support for Zynq QSPI controllerNaga Sureshkumar Relli1-0/+761