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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
root
/
include
/
linux
/
mfd
/
intel-m10-bmc.h
Age
Commit message (
Expand
)
Author
Files
Lines
2023-06-15
mfd: intel-m10-bmc: Manage access to MAX 10 fw handshake registers
Ilpo Järvinen
1
-0
/
+28
2023-06-15
mfd: intel-m10-bmc: Move m10bmc_sys_read() away from header
Ilpo Järvinen
1
-16
/
+1
2023-06-15
mfd: intel-m10-bmc: Create m10bmc_sys_update_bits()
Ilpo Järvinen
1
-0
/
+4
2023-01-30
fpga: m10bmc-sec: Add support for N6000
Ilpo Järvinen
1
-0
/
+51
2023-01-27
mfd: intel-m10-bmc: Add PMCI driver
Ilpo Järvinen
1
-0
/
+28
2023-01-27
fpga: m10bmc-sec: Make rsu status type specific
Ilpo Järvinen
1
-1
/
+0
2023-01-27
mfd: intel-m10-bmc: Prefix register defines with M10BMC_N3000
Ilpo Järvinen
1
-33
/
+33
2023-01-27
mfd: intel-m10-bmc: Support multiple CSR register layouts
Ilpo Järvinen
1
-4
/
+34
2023-01-27
mfd: intel-m10-bmc: Split into core and spi specific parts
Ilpo Järvinen
1
-0
/
+6
2023-01-27
mfd: intel-m10-bmc: Create m10bmc_platform_info for type specific info
Ilpo Järvinen
1
-0
/
+12
2023-01-27
mfd: intel-m10-bmc: Add missing includes to header
Ilpo Järvinen
1
-0
/
+3
2021-04-14
mfd: intel-m10-bmc: Add support for MAX10 BMC Secure Updates
Russ Weight
1
-0
/
+85
2021-04-14
mfd: intel-m10-bmc: Add access table configuration to the regmap
Matthew Gerlach
1
-1
/
+4
2021-04-14
mfd: intel-m10-bmc: Simplify the legacy version reg definition
Xu Yilun
1
-1
/
+1
2021-04-14
mfd: intel-m10-bmc: Fix the register access range
Xu Yilun
1
-1
/
+1
2021-02-08
mfd: intel-m10-bmc: Expose MAC address and count
Russ Weight
1
-0
/
+9
2020-09-30
mfd: intel-m10-bmc: Add Intel MAX 10 BMC chip support for Intel FPGA PAC
Xu Yilun
1
-0
/
+65