drivers/clk/socfpga/Makefile


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# SPDX-License-Identifier: GPL-2.0
obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o
obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o
obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-s10.o \
				     clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o \
				     clk-agilex.o