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/* SPDX-License-Identifier: GPL-2.0
*
* Copyright 2016-2018 HabanaLabs, Ltd.
* All Rights Reserved.
*
*/
/************************************
** This is an auto-generated file **
** DO NOT EDIT BELOW **
************************************/
#ifndef ASIC_REG_SIF_RTR_CTRL_2_REGS_H_
#define ASIC_REG_SIF_RTR_CTRL_2_REGS_H_
/*
*****************************************
* SIF_RTR_CTRL_2 (Prototype: RTR_CTRL)
*****************************************
*/
#define mmSIF_RTR_CTRL_2_PERM_SEL 0x326108
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_0 0x326114
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_1 0x326118
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_2 0x32611C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_3 0x326120
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_4 0x326124
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_5 0x326128
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_6 0x32612C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_7 0x326130
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_8 0x326134
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_9 0x326138
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_10 0x32613C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_11 0x326140
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_12 0x326144
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_13 0x326148
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_14 0x32614C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_15 0x326150
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_16 0x326154
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_17 0x326158
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_18 0x32615C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_19 0x326160
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_20 0x326164
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_21 0x326168
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_22 0x32616C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_23 0x326170
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_24 0x326174
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_25 0x326178
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_26 0x32617C
#define mmSIF_RTR_CTRL_2_HBM_POLY_H3_27 0x326180
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_0 0x326184
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_1 0x326188
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_2 0x32618C
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_3 0x326190
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_4 0x326194
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_5 0x326198
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_6 0x32619C
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_7 0x3261A0
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_8 0x3261A4
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_9 0x3261A8
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_10 0x3261AC
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_11 0x3261B0
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_12 0x3261B4
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_13 0x3261B8
#define mmSIF_RTR_CTRL_2_SRAM_POLY_H3_14 0x3261BC
#define mmSIF_RTR_CTRL_2_SCRAM_SRAM_EN 0x32626C
#define mmSIF_RTR_CTRL_2_RL_HBM_EN 0x326274
#define mmSIF_RTR_CTRL_2_RL_HBM_SAT 0x326278
#define mmSIF_RTR_CTRL_2_RL_HBM_RST 0x32627C
#define mmSIF_RTR_CTRL_2_RL_HBM_TIMEOUT 0x326280
#define mmSIF_RTR_CTRL_2_SCRAM_HBM_EN 0x326284
#define mmSIF_RTR_CTRL_2_RL_PCI_EN 0x326288
#define mmSIF_RTR_CTRL_2_RL_PCI_SAT 0x32628C
#define mmSIF_RTR_CTRL_2_RL_PCI_RST 0x326290
#define mmSIF_RTR_CTRL_2_RL_PCI_TIMEOUT 0x326294
#define mmSIF_RTR_CTRL_2_RL_SRAM_EN 0x32629C
#define mmSIF_RTR_CTRL_2_RL_SRAM_SAT 0x3262A0
#define mmSIF_RTR_CTRL_2_RL_SRAM_RST 0x3262A4
#define mmSIF_RTR_CTRL_2_RL_SRAM_TIMEOUT 0x3262AC
#define mmSIF_RTR_CTRL_2_RL_SRAM_RED 0x3262B4
#define mmSIF_RTR_CTRL_2_E2E_HBM_EN 0x3262EC
#define mmSIF_RTR_CTRL_2_E2E_PCI_EN 0x3262F0
#define mmSIF_RTR_CTRL_2_E2E_HBM_WR_SIZE 0x3262F4
#define mmSIF_RTR_CTRL_2_E2E_PCI_WR_SIZE 0x3262F8
#define mmSIF_RTR_CTRL_2_E2E_AW_PCI_CTR_SET_EN 0x326404
#define mmSIF_RTR_CTRL_2_E2E_AW_PCI_CTR_SET 0x326408
#define mmSIF_RTR_CTRL_2_E2E_AW_PCI_CTR_WRAP 0x32640C
#define mmSIF_RTR_CTRL_2_E2E_AW_PCI_CTR_CNT 0x326410
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM_CTR_SET_EN 0x326414
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM_CTR_SET 0x326418
#define mmSIF_RTR_CTRL_2_E2E_HBM_RD_SIZE 0x32641C
#define mmSIF_RTR_CTRL_2_E2E_PCI_RD_SIZE 0x326420
#define mmSIF_RTR_CTRL_2_E2E_AR_PCI_CTR_SET_EN 0x326424
#define mmSIF_RTR_CTRL_2_E2E_AR_PCI_CTR_SET 0x326428
#define mmSIF_RTR_CTRL_2_E2E_AR_PCI_CTR_WRAP 0x32642C
#define mmSIF_RTR_CTRL_2_E2E_AR_PCI_CTR_CNT 0x326430
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM_CTR_SET_EN 0x326434
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM_CTR_SET 0x326438
#define mmSIF_RTR_CTRL_2_NL_HBM_SEL_0 0x326450
#define mmSIF_RTR_CTRL_2_NL_HBM_SEL_1 0x326454
#define mmSIF_RTR_CTRL_2_NON_LIN_EN 0x326480
#define mmSIF_RTR_CTRL_2_NL_SRAM_BANK_0 0x326500
#define mmSIF_RTR_CTRL_2_NL_SRAM_BANK_1 0x326504
#define mmSIF_RTR_CTRL_2_NL_SRAM_BANK_2 0x326508
#define mmSIF_RTR_CTRL_2_NL_SRAM_BANK_3 0x32650C
#define mmSIF_RTR_CTRL_2_NL_SRAM_BANK_4 0x326510
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_0 0x326514
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_1 0x326520
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_2 0x326524
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_3 0x326528
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_4 0x32652C
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_5 0x326530
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_6 0x326534
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_7 0x326538
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_8 0x32653C
#define mmSIF_RTR_CTRL_2_NL_SRAM_OFFSET_9 0x326540
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_0 0x326550
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_1 0x326554
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_2 0x326558
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_3 0x32655C
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_4 0x326560
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_5 0x326564
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_6 0x326568
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_7 0x32656C
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_8 0x326570
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_9 0x326574
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_10 0x326578
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_11 0x32657C
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_12 0x326580
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_13 0x326584
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_14 0x326588
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_15 0x32658C
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_16 0x326590
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_17 0x326594
#define mmSIF_RTR_CTRL_2_NL_HBM_OFFSET_18 0x326598
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_0 0x3265E4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_1 0x3265E8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_2 0x3265EC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_3 0x3265F0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_4 0x3265F4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_5 0x3265F8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_6 0x3265FC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_7 0x326600
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_8 0x326604
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_9 0x326608
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_10 0x32660C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_11 0x326610
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_12 0x326614
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_13 0x326618
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_14 0x32661C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AW_15 0x326620
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_0 0x326624
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_1 0x326628
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_2 0x32662C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_3 0x326630
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_4 0x326634
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_5 0x326638
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_6 0x32663C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_7 0x326640
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_8 0x326644
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_9 0x326648
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_10 0x32664C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_11 0x326650
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_12 0x326654
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_13 0x326658
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_14 0x32665C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AW_15 0x326660
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_0 0x326664
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_1 0x326668
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_2 0x32666C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_3 0x326670
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_4 0x326674
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_5 0x326678
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_6 0x32667C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_7 0x326680
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_8 0x326684
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_9 0x326688
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_10 0x32668C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_11 0x326690
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_12 0x326694
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_13 0x326698
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_14 0x32669C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AW_15 0x3266A0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_0 0x3266A4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_1 0x3266A8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_2 0x3266AC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_3 0x3266B0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_4 0x3266B4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_5 0x3266B8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_6 0x3266BC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_7 0x3266C0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_8 0x3266C4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_9 0x3266C8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_10 0x3266CC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_11 0x3266D0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_12 0x3266D4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_13 0x3266D8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_14 0x3266DC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AW_15 0x3266E0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_0 0x3266E4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_1 0x3266E8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_2 0x3266EC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_3 0x3266F0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_4 0x3266F4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_5 0x3266F8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_6 0x3266FC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_7 0x326700
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_8 0x326704
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_9 0x326708
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_10 0x32670C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_11 0x326710
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_12 0x326714
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_13 0x326718
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_14 0x32671C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AW_15 0x326720
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_0 0x326724
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_1 0x326728
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_2 0x32672C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_3 0x326730
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_4 0x326734
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_5 0x326738
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_6 0x32673C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_7 0x326740
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_8 0x326744
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_9 0x326748
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_10 0x32674C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_11 0x326750
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_12 0x326754
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_13 0x326758
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_14 0x32675C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AW_15 0x326760
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_0 0x326764
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_1 0x326768
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_2 0x32676C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_3 0x326770
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_4 0x326774
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_5 0x326778
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_6 0x32677C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_7 0x326780
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_8 0x326784
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_9 0x326788
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_10 0x32678C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_11 0x326790
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_12 0x326794
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_13 0x326798
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_14 0x32679C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AW_15 0x3267A0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_0 0x3267A4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_1 0x3267A8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_2 0x3267AC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_3 0x3267B0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_4 0x3267B4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_5 0x3267B8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_6 0x3267BC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_7 0x3267C0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_8 0x3267C4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_9 0x3267C8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_10 0x3267CC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_11 0x3267D0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_12 0x3267D4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_13 0x3267D8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_14 0x3267DC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AW_15 0x3267E0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_0 0x326824
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_1 0x326828
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_2 0x32682C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_3 0x326830
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_4 0x326834
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_5 0x326838
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_6 0x32683C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_7 0x326840
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_8 0x326844
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_9 0x326848
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_10 0x32684C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_11 0x326850
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_12 0x326854
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_13 0x326858
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_14 0x32685C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_LOW_AR_15 0x326860
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_0 0x326864
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_1 0x326868
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_2 0x32686C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_3 0x326870
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_4 0x326874
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_5 0x326878
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_6 0x32687C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_7 0x326880
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_8 0x326884
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_9 0x326888
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_10 0x32688C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_11 0x326890
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_12 0x326894
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_13 0x326898
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_14 0x32689C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_BASE_HIGH_AR_15 0x3268A0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_0 0x3268A4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_1 0x3268A8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_2 0x3268AC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_3 0x3268B0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_4 0x3268B4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_5 0x3268B8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_6 0x3268BC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_7 0x3268C0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_8 0x3268C4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_9 0x3268C8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_10 0x3268CC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_11 0x3268D0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_12 0x3268D4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_13 0x3268D8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_14 0x3268DC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_LOW_AR_15 0x3268E0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_0 0x3268E4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_1 0x3268E8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_2 0x3268EC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_3 0x3268F0
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_4 0x3268F4
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_5 0x3268F8
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_6 0x3268FC
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_7 0x326900
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_8 0x326904
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_9 0x326908
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_10 0x32690C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_11 0x326910
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_12 0x326914
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_13 0x326918
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_14 0x32691C
#define mmSIF_RTR_CTRL_2_RANGE_SEC_MASK_HIGH_AR_15 0x326920
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_0 0x326924
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_1 0x326928
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_2 0x32692C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_3 0x326930
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_4 0x326934
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_5 0x326938
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_6 0x32693C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_7 0x326940
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_8 0x326944
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_9 0x326948
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_10 0x32694C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_11 0x326950
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_12 0x326954
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_13 0x326958
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_14 0x32695C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_LOW_AR_15 0x326960
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_0 0x326964
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_1 0x326968
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_2 0x32696C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_3 0x326970
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_4 0x326974
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_5 0x326978
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_6 0x32697C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_7 0x326980
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_8 0x326984
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_9 0x326988
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_10 0x32698C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_11 0x326990
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_12 0x326994
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_13 0x326998
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_14 0x32699C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_BASE_HIGH_AR_15 0x3269A0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_0 0x3269A4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_1 0x3269A8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_2 0x3269AC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_3 0x3269B0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_4 0x3269B4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_5 0x3269B8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_6 0x3269BC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_7 0x3269C0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_8 0x3269C4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_9 0x3269C8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_10 0x3269CC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_11 0x3269D0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_12 0x3269D4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_13 0x3269D8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_14 0x3269DC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_LOW_AR_15 0x3269E0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_0 0x3269E4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_1 0x3269E8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_2 0x3269EC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_3 0x3269F0
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_4 0x3269F4
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_5 0x3269F8
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_6 0x3269FC
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_7 0x326A00
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_8 0x326A04
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_9 0x326A08
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_10 0x326A0C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_11 0x326A10
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_12 0x326A14
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_13 0x326A18
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_14 0x326A1C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_MASK_HIGH_AR_15 0x326A20
#define mmSIF_RTR_CTRL_2_RANGE_SEC_HIT_AW 0x326A64
#define mmSIF_RTR_CTRL_2_RANGE_SEC_HIT_AR 0x326A68
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_HIT_AW 0x326A6C
#define mmSIF_RTR_CTRL_2_RANGE_PRIV_HIT_AR 0x326A70
#define mmSIF_RTR_CTRL_2_RGL_CFG 0x326B64
#define mmSIF_RTR_CTRL_2_RGL_SHIFT 0x326B68
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_0 0x326B6C
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_1 0x326B70
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_2 0x326B74
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_3 0x326B78
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_4 0x326B7C
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_5 0x326B80
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_6 0x326B84
#define mmSIF_RTR_CTRL_2_RGL_EXPECTED_LAT_7 0x326B88
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_0 0x326BAC
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_1 0x326BB0
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_2 0x326BB4
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_3 0x326BB8
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_4 0x326BBC
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_5 0x326BC0
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_6 0x326BC4
#define mmSIF_RTR_CTRL_2_RGL_TOKEN_7 0x326BC8
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_0 0x326BEC
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_1 0x326BF0
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_2 0x326BF4
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_3 0x326BF8
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_4 0x326BFC
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_5 0x326C00
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_6 0x326C04
#define mmSIF_RTR_CTRL_2_RGL_BANK_ID_7 0x326C08
#define mmSIF_RTR_CTRL_2_RGL_WDT 0x326C2C
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM0_CH0_CTR_WRAP 0x326C30
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM0_CH1_CTR_WRAP 0x326C34
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM1_CH0_CTR_WRAP 0x326C38
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM1_CH1_CTR_WRAP 0x326C3C
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM2_CH0_CTR_WRAP 0x326C40
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM2_CH1_CTR_WRAP 0x326C44
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM3_CH0_CTR_WRAP 0x326C48
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM3_CH1_CTR_WRAP 0x326C4C
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM0_CH0_CTR_CNT 0x326C50
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM0_CH1_CTR_CNT 0x326C54
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM1_CH0_CTR_CNT 0x326C58
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM1_CH1_CTR_CNT 0x326C5C
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM2_CH0_CTR_CNT 0x326C60
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM2_CH1_CTR_CNT 0x326C64
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM3_CH0_CTR_CNT 0x326C68
#define mmSIF_RTR_CTRL_2_E2E_AR_HBM3_CH1_CTR_CNT 0x326C6C
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM0_CH0_CTR_WRAP 0x326C70
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM0_CH1_CTR_WRAP 0x326C74
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM1_CH0_CTR_WRAP 0x326C78
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM1_CH1_CTR_WRAP 0x326C7C
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM2_CH0_CTR_WRAP 0x326C80
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM2_CH1_CTR_WRAP 0x326C84
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM3_CH0_CTR_WRAP 0x326C88
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM3_CH1_CTR_WRAP 0x326C8C
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM0_CH0_CTR_CNT 0x326C90
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM0_CH1_CTR_CNT 0x326C94
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM1_CH0_CTR_CNT 0x326C98
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM1_CH1_CTR_CNT 0x326C9C
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM2_CH0_CTR_CNT 0x326CA0
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM2_CH1_CTR_CNT 0x326CA4
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM3_CH0_CTR_CNT 0x326CA8
#define mmSIF_RTR_CTRL_2_E2E_AW_HBM3_CH1_CTR_CNT 0x326CAC
#define mmSIF_RTR_CTRL_2_NL_HBM_PC_SEL_0 0x326CB0
#define mmSIF_RTR_CTRL_2_NL_HBM_PC_SEL_1 0x326CB4
#define mmSIF_RTR_CTRL_2_NL_HBM_PC_SEL_2 0x326CB8
#define mmSIF_RTR_CTRL_2_NL_HBM_PC_SEL_3 0x326CBC
#endif /* ASIC_REG_SIF_RTR_CTRL_2_REGS_H_ */
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