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author | Anup Patel <anup.patel@wdc.com> | 2020-08-15 19:47:58 +0300 |
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committer | Anup Patel <anup@brainfault.org> | 2020-08-21 17:05:31 +0300 |
commit | 4f3bad6e43f0e5a1a124847edf910e309ae9d59a (patch) | |
tree | 369be374aa21a7c2c77eee0e6feecdd8461a2d9c /lib/sbi/sbi_hart.c | |
parent | e435ba05248a10a5085858c46fe11854373d5dbc (diff) | |
download | opensbi-4f3bad6e43f0e5a1a124847edf910e309ae9d59a.tar.xz |
lib: sbi: Handle the case where MTVAL has illegal instruction address
The Kendryte K210 follows RISC-V v1.9 spec so MTVAL has instruction
address (instead of instruction encoding) on illegal instruction trap.
To handle above case, we fix sbi_illegal_insn_handler() without any
impact on RISC-V v1.10 (or higher) systems. This achieved by exploiting
the fact that program counter (and instruction address) is always 2-byte
aligned in RISC-V world.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Tested-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'lib/sbi/sbi_hart.c')
0 files changed, 0 insertions, 0 deletions