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| author | Anup Patel <anup.patel@wdc.com> | 2020-05-12 10:27:52 +0300 |
|---|---|---|
| committer | Anup Patel <anup@brainfault.org> | 2020-05-23 08:06:29 +0300 |
| commit | 446a9c6d1eb97fcedd6a94ac76d15e941a6087a8 (patch) | |
| tree | b8b8d6e8fec3fb2caf01913b0f2139c4f8695846 /platform/fpga | |
| parent | 73d6ef3b2933ccf0b3a8a0ba110bf53ad9720b51 (diff) | |
| download | opensbi-446a9c6d1eb97fcedd6a94ac76d15e941a6087a8.tar.xz | |
lib: utils: Allow PLIC functions to be used for multiple PLICs
We extend all PLIC functions to have a "struct plic_data *"
parameter pointing to PLIC details. This allows platforms to
use these functions for multiple PLIC instances.
Signed-off-by: Anup Patel <anup.patel@wdc.com>
Reviewed-by: Atish Patra <atish.patra@wdc.com>
Diffstat (limited to 'platform/fpga')
| -rw-r--r-- | platform/fpga/ariane/platform.c | 16 | ||||
| -rw-r--r-- | platform/fpga/openpiton/platform.c | 29 |
2 files changed, 24 insertions, 21 deletions
diff --git a/platform/fpga/ariane/platform.c b/platform/fpga/ariane/platform.c index c3f3f65..275f2ce 100644 --- a/platform/fpga/ariane/platform.c +++ b/platform/fpga/ariane/platform.c @@ -26,6 +26,11 @@ #define ARIANE_HART_COUNT 1 #define ARIANE_CLINT_ADDR 0x2000000 +static struct plic_data plic = { + .addr = ARIANE_PLIC_ADDR, + .num_src = ARIANE_PLIC_NUM_SOURCES, +}; + /* * Ariane platform early initialization. */ @@ -70,19 +75,19 @@ static int plic_ariane_warm_irqchip_init(int m_cntx_id, int s_cntx_id) /* By default, enable all IRQs for M-mode of target HART */ if (m_cntx_id > -1) { for (i = 0; i < ie_words; i++) - plic_set_ie(m_cntx_id, i, 1); + plic_set_ie(&plic, m_cntx_id, i, 1); } /* Enable all IRQs for S-mode of target HART */ if (s_cntx_id > -1) { for (i = 0; i < ie_words; i++) - plic_set_ie(s_cntx_id, i, 1); + plic_set_ie(&plic, s_cntx_id, i, 1); } /* By default, enable M-mode threshold */ if (m_cntx_id > -1) - plic_set_thresh(m_cntx_id, 1); + plic_set_thresh(&plic, m_cntx_id, 1); /* By default, disable S-mode threshold */ if (s_cntx_id > -1) - plic_set_thresh(s_cntx_id, 0); + plic_set_thresh(&plic, s_cntx_id, 0); return 0; } @@ -96,8 +101,7 @@ static int ariane_irqchip_init(bool cold_boot) int ret; if (cold_boot) { - ret = plic_cold_irqchip_init(ARIANE_PLIC_NUM_SOURCES, - ARIANE_HART_COUNT); + ret = plic_cold_irqchip_init(&plic); if (ret) return ret; } diff --git a/platform/fpga/openpiton/platform.c b/platform/fpga/openpiton/platform.c index 781da17..e56ee51 100644 --- a/platform/fpga/openpiton/platform.c +++ b/platform/fpga/openpiton/platform.c @@ -27,14 +27,14 @@ #define OPENPITON_DEFAULT_CLINT_ADDR 0xfff1020000 static struct platform_uart_data uart = { - OPENPITON_DEFAULT_UART_ADDR, - OPENPITON_DEFAULT_UART_FREQ, - OPENPITON_DEFAULT_UART_BAUDRATE, - }; -static struct platform_plic_data plic = { - OPENPITON_DEFAULT_PLIC_ADDR, - OPENPITON_DEFAULT_PLIC_NUM_SOURCES, - }; + OPENPITON_DEFAULT_UART_ADDR, + OPENPITON_DEFAULT_UART_FREQ, + OPENPITON_DEFAULT_UART_BAUDRATE, +}; +static struct plic_data plic = { + .addr = OPENPITON_DEFAULT_PLIC_ADDR, + .num_src = OPENPITON_DEFAULT_PLIC_NUM_SOURCES, +}; static unsigned long clint_addr = OPENPITON_DEFAULT_CLINT_ADDR; /* @@ -44,7 +44,7 @@ static int openpiton_early_init(bool cold_boot) { void *fdt; struct platform_uart_data uart_data; - struct platform_plic_data plic_data; + struct plic_data plic_data; unsigned long clint_data; int rc; @@ -102,19 +102,19 @@ static int plic_openpiton_warm_irqchip_init(int m_cntx_id, int s_cntx_id) /* By default, enable all IRQs for M-mode of target HART */ if (m_cntx_id > -1) { for (i = 0; i < ie_words; i++) - plic_set_ie(m_cntx_id, i, 1); + plic_set_ie(&plic, m_cntx_id, i, 1); } /* Enable all IRQs for S-mode of target HART */ if (s_cntx_id > -1) { for (i = 0; i < ie_words; i++) - plic_set_ie(s_cntx_id, i, 1); + plic_set_ie(&plic, s_cntx_id, i, 1); } /* By default, enable M-mode threshold */ if (m_cntx_id > -1) - plic_set_thresh(m_cntx_id, 1); + plic_set_thresh(&plic, m_cntx_id, 1); /* By default, disable S-mode threshold */ if (s_cntx_id > -1) - plic_set_thresh(s_cntx_id, 0); + plic_set_thresh(&plic, s_cntx_id, 0); return 0; } @@ -128,8 +128,7 @@ static int openpiton_irqchip_init(bool cold_boot) int ret; if (cold_boot) { - ret = plic_cold_irqchip_init(plic.addr, - plic.num_src); + ret = plic_cold_irqchip_init(&plic); if (ret) return ret; } |