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2022-06-21lib: utils/timer: Add a separate compatible for the D1 CLINTSamuel Holland1-3/+1
The CLINT in the Allwinner D1 SoC apparently does not support 64-bit MMIO access. A property was added to support this quirk (and that property was copied to the ACLINT MTIMER code). However, since this difference in behavior makes the D1 CLINT incompatible with the SiFive CLINT's programming interface, a better solution is to use a separate compatible string. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-04-28docs: pmu: Improve the PMU DT bindingsAtish Patra1-18/+31
The current DT binding description is misleading and confusing. Clarify the text and provide more examples. Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2021-12-11docs/platform: spike: Enhance Spike examplesTsukasa OI1-1/+12
This commit makes Spike usable as QEMU (in fact, those are based on QEMU examples). Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-12-03lib: pmu: support the event ID encoded by a bitmap.Vincent Chen1-8/+16
RISC-V privilege specification does not specify how to encode the event ID. Therefore, each platform is allowed to customize its own encoding rule. The common encoding methods are as follow, directly assigning a number to an event, or every bit in the mphmevent CSR controls one specified event or mixes the above two methods. To enable OpenSBI to support the above three encoding methods simultaneously, this patch repurpose the dt property "riscv,raw-event-to-mhpmcounters". The "riscv,raw-event-to-mhpmcounters" will describes the one or multiple raw events that could be counted by a set of counters. But, the column number of "riscv,raw-event-to-mhpmcounters" is extended from 2 to 3. The 1st column (64bit) is the ID of the raw events. The 2nd column (64bit) represents a select_mask now to represent the bits used for event ID encoding. If a platform directly encodes each raw PMU event as a unique ID, the value of select_mask will be 0xffffffff_ffffffff. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Atish Patra<atishp@rivosinc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-11lib: utils: Rename the prefix in PMU DT propertiesAtish Patra1-6/+6
As per the DT schema rules, the prefix should be vendor. As the PMU properties are generic for all vendors, change the prefix to riscv instead of pmu. Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-10-21lib: utils/irqchip: Automatically delegate T-HEAD PLIC accessOpenSBI-v0.9-78c2b19Samuel Holland1-9/+3
The T-HEAD PLIC implementation requires setting a delegation bit to allow access from S-mode. Now that the T-HEAD PLIC has its own compatible string, set this bit automatically from the PLIC driver, instead of reaching into the PLIC's MMIO space from another driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-17docs: Document FW_PIC compile time optionBin Meng1-0/+6
FW_PIC=y is on by default, but the doc is missing when this was introduced. Add some description for it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-17docs: Document parameters passed to firmware and alignment requirementBin Meng2-2/+10
This updates documentation to describe parameters passed to firmware from previous booting stage, and corresponding address alignment requirement. This also fixes a typo in fw_dynamic.md (it's => its). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11docs: Make <xyz> visible in the rendered platform guideBin Meng1-8/+8
At present in the rendered platform guide, all instances of <xyz> are missing. Use &lt; and &gt; to replace <> to make them visible. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11docs: Correct a typo in platform_guide.mdBin Meng1-1/+1
It's riscv-pk, not riskv-pk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11docs: Add device tree bindings for SBI PMU extensionAtish Patra1-0/+79
SBI PMU extension requires a firmware to be aware of the event to counter/mhpmevent mappings supported by the hardware. One approach is to encode that information in the device tree. Define a device tree binding that allows a hardware to describe all the PMU mappings required in concise format. Reviewed-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-07-06docs/platform: thead-c9xx: Remove FW_PIC=yBin Meng1-1/+1
FW_PIC is on by default. Hence no need to explicitly require it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-06-11docs/platform: andes-ae350: Fix missing spacesBin Meng1-3/+3
Fix several places in the docmentation that are missing spaces. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-06-02docs: debugging OpenSBIHeinrich Schuchardt1-0/+24
Describe how to debug OpenSBI on QEMU with GDB. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-05-06docs: platform: Describe sifive_fu540 as supported generic platformBin Meng2-8/+10
The upstream U-Boot/QEMU have been using generic platform for SiFive HiFive Unleashed board for some time. Let's document sifive_fu540 as one of the supported targets for "generic" platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-05-06docs: platform: Sort platform namesBin Meng1-2/+2
Let's sort the platform names in alphabetical order. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-29docs/platform: sifive_fu540: Update U-Boot defconfig nameBin Meng1-5/+6
With latest U-Boot upstream (v2021.07 in development), the defconfig name has been changed to sifive_unleashed_defconfig. Update the doc. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28docs: generic: Add T-HEAD C9xx series processorsGuo Ren2-0/+206
Add description and dts examples for T-HEAD C9xx platforms. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28platform: Remove platform/theadGuo Ren2-37/+0
We could use platform/generic instead, and won't use platform/thead/c910 again. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-12docs: fix link to OpenPiton documentationhasheddan1-2/+2
Updates link in platforms documentation to point to the correct OpenPiton document. Signed-off-by: hasheddan <georgedanielmangum@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-12-04docs: Add domain device tree binding documentationAnup Patel1-0/+208
This patch adds domain device tree binding documentation in the OpenSBI domain support documentation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-11-27docs: fix a typo errorYuan Li1-1/+1
fix a typo error in docs/platform/sifive_fu540.md Signed-off-by: Yuan Li <dskwelmcy@163.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-21docs: Add initial documentation for domain supportAnup Patel2-0/+107
We add initial documentation for OpenSBI domain support to help RISC-V platform vendors achieve system-level partitioning. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-18firmware: Remove FW_PAYLOAD_FDT_PATH compile-time optionAnup Patel4-14/+9
The FW_PAYLOAD_FDT_PATH compile-time option is replaced by FW_FDT_PATH compile-time option which is more flexible and common across all OpenSBI firmwares. This patch removes FW_PAYLOAD_FDT_PATH and updates related documentation to use FW_FDT_PATH. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-18firmware: Add common FW_FDT_PATH compile-time optionAnup Patel1-5/+11
Currently, only FW_PAYLOAD has mechanism to embed external FDT using FW_PAYLOAD_FDT_PATH compile-time option. This patch adds a common FW_FDT_PATH compile-time option to embed external FDT for all OpenSBI firmwares (i.e FW_JUMP, FW_PAYLOAD, and FW_DYNAMIC). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-29docs/platform: sifive_fu540: Update U-Boot instructionsBin Meng1-5/+30
U-Boot v2020.07 release adds SPL support to SiFive HiFive Unleashed. Update the doc to mention that detailed build instructions are in the U-Boot doc. This also adds detailed command line description to show how to boot U-Boot v2020.07 S-mode payload in the QEMU chapter. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-29docs/platform: Update QEMU parameter for fw_payloadBin Meng2-8/+8
Since QEMU v5.1, if there is no "-bios" option provided, the default OpenSBI firmware will be loaded by QEMU as the BIOS automatically, hence to load fw_payload type image, we should explicitly pass the "-bios" option to QEMU. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-19platform: Add support for Shakti C-class SoC from IIT-MVijai Kumar K3-0/+40
C-Class is a member of the SHAKTI family of processors from Indian Institute of Technology - Madras(IIT-M). It is an extremely configurable and commercial-grade 5-stage in-order core supporting the standard RV64GCSUN ISA extensions. https://gitlab.com/shaktiproject/cores/c-class/blob/master/README.md We add OpenSBI support for Shakti C-class SoC. Signed-off-by: Vijai Kumar K <vijai@behindbytes.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-06-08docs: Remove redundant documentation about combined payload use caseAtish Patra1-23/+0
U-Boot now supports loading Linux kernel image via network and storage media. Thus, we don't need to use a combined payload containing both U-Boot & Linux kernel image to boot Linux from U-Boot prompt. Remove the old documentation. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-06-08docs: Use doxygen config to mark the main pageAtish Patra1-1/+1
The doxygen config option "USE_MDFILE_AS_MAINPAGE" can be used to set the main page in doxygen generated pdf. This allows us to remove the "#mainpage" from the README file which markdown doesn't parse. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-06-05firmware: Remove FW_PAYLOAD_FDT and related documentationAnup Patel1-14/+2
Now that no platform is using FW_PAYLOAD_FDT mechanism, we remove related code from Makefile and related documentation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-07docs: Don't use italic text in page titleAnup Patel3-3/+3
Doxygen does not support italic text in page title so fix some of the markdown files accordingly. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-07docs: Fix ordering of pages in table of contentsAnup Patel1-1/+1
Currently, all markdown pages are randomly arranged in table of contents so to fix this we treat top-level README.md as mainpage and enable Doxygen TREEVIEW. Also, there should not be any text before title of a markdown page so we move project copyright as separate section in top-level README.md. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-07docs: Add platform requirements documentAnup Patel2-0/+45
We add platform requirements document to clarify OpenSBI expectations from a RISC-V platform. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com>
2020-05-07docs: platform/generic: Add details about IPI and timer expectationsAnup Patel1-0/+4
The generic platform provides IPI and timer functionality based on DT node provided in the FDT passed by previous booting stage. This patch updates generic platform documentation about IPI and timer expectations. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-07docs: platform/generic: Add details about stdout-path DT propertyAnup Patel1-0/+2
The generic platform will try to select serial console based on the stdout-path DT property in /chosen DT node hence we document this. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-05-04docs: Add missing links in platform.mdAnup Patel1-7/+12
The links to some of the platforms were missing in platform.md file hence this patch. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2020-05-04platform: Remove spike directoryAnup Patel2-10/+12
The OpenSBI generic platform works perfectly fine on the QEMU spike machine and Spike emulator so let's remove dedicated Spike platform from OpenSBI. All Spike platform related documentation in OpenSBI will now suggest using OpenSBI generic platform. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2020-05-04platform: Remove qemu/virt directoryAnup Patel2-25/+25
The OpenSBI generic platform works perfectly fine on the QEMU virt machine so let's remove dedicated QEMU virt machine platform from OpenSBI. All QEMU virt machine related documentation in OpenSBI will now suggest using OpenSBI generic platform. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
2020-05-01platform: Add generic FDT based platform supportAnup Patel2-0/+48
We add generic FDT based platform support which provides platform specific functionality based on the FDT passed by previous booting stage. By default, the generic FDT platform makes following assumptions: 1. platform FW_TEXT_START is 0x80000000 2. platform features are default 3. platform stack size is default 4. platform has no quirks or work-arounds The above assumptions (except 1) can be overridden by adding special platform callbacks which will be called based on the FDT root node compatible string. By default, we compile OpenSBI generic platform as follows: $ make PLATFORM=generic For a non-standard FW_TEXT_START, we can compile OpenSBI generic platform as follows: $ make PLATFORM=generic FW_TEXT_START=<non_standard_text_start> Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-04-29platform: Add Nuclei UX600 platformHuaqi Fang1-0/+22
* Nuclei UX600 is a 64-bit RISC-V core developed by Nuclei System Technology, see https://nucleisys.com/product.php * The ISA is configurable in hardware on your demand Signed-off-by: Huaqi Fang <578567190@qq.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-03-24platform: Add OpenPiton platform supportAtish Patra2-0/+37
OpenPiton is a research platform from Princeton University [1]. "OpenPiton is the world's first open source, general purpose, multithreaded manycore processor. It is a tiled manycore framework scalable from one to 1/2 billion cores." Add OpenSBI support for OpenPiton. As it is based on ariane core, it reuses the platform code from arine project. [1]. https://github.com/PrincetonUniversity/openpiton Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-24platform: Move ariane standalone fpga project to its own projectAtish Patra2-3/+3
Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-03-19platform: sifive/fu540: Remove FU540_ENABLED_HART_MASK optionAnup Patel1-10/+2
The FU540_ENABLED_HART_MASK compile time option was added for initial bring-up on SiFive Unleashed. This option is redundant now because disabled_hart_mask is already removed. Based on this rationale, we remove FU540_ENABLED_HART_MASK compile time option. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-03-11docs: Remove out-of-date documentationAtish Patra1-27/+2
Upstream U-Boot now have SMP support and doesn't require any additional patches for HiFive Unleashed. Update the documentation. Signed-off-by: Atish Patra <atish.patra@wdc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
2020-02-19platform: sifive: fu540: Add 32-bit specific fdt/payload addressesBin Meng1-0/+4
For testing 32-bit SiFive specific drivers with QEMU riscv32, add 32-bit specific FW_JUMP_FDT_ADDR and FW_PAYLOAD_OFFSET. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-02-18doc: thead-c910: Fix doc stylesBin Meng1-3/+3
- make title underline the same length as the title itself - satisfy the 80 character per line rule as much as possible Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-02-18doc: sifive_fu540: Fix doc stylesBin Meng1-8/+10
- make title underline the same length as the title itself - put all URLs at the end of the doc Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-02-18doc: qemu_virt: Fix doc stylesBin Meng1-1/+0
Remove the unnecessary blank line at the end of the doc. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-02-18doc: ariane-fpga: Fix doc stylesBin Meng1-11/+12
Various styles fixes including: - satisfy the 80 character per line rule as much as possible - make title underline the same length as the title itself - remove the redundant FPGA (was FPGA FPGA SoC) Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
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