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2023-02-27platform: generic: Add system suspend testAndrew Jones1-0/+4
When the system-suspend-test property is present in the domain config node as shown below, implement system suspend with a simple 5 second delay followed by a WFI. This allows testing system suspend when the low-level firmware doesn't support it. / { chosen { opensbi-domains { compatible = "opensbi,domain,config"; system-suspend-test; }; Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-02-27docs: Correct opensbi-domain property nameAndrew Jones1-3/+3
Replace the commas with dashes to correct the name. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-02-27lib: sbi: Add system_suspend_allowed domain propertyAndrew Jones1-0/+5
Only privileged domains should be allowed to suspend the entire system. Give the root domain this property by default and allow other domains to be given the property by specifying it in the DT. Signed-off-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-02-27docs: domain_support: Update the DT exampleBin Meng1-2/+2
commit 3e2f573e707e ("lib: utils: Disallow non-root domains from adding M-mode regions") added access permission check in __fdt_parse_region(). With the existing DT example in the doc OpenSBI won't boot anymore. Let's update the DT example so that it can work out of the box. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-02-27docs: fix typo in fw.mdShengyu Qu1-1/+1
In docs/firmware/fw.md, there's a configuration parameter called FW_TEXT_ADDR, which actually should be FW_TEXT_START, so fix it. Signed-off-by: Shengyu Qu <wiagn233@outlook.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-01-22docs: generic.md: fix typo of andes-ae350Yu Chien Peter Lin1-1/+1
Fix hyperlink due to the typo. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2023-01-09docs: Update domain's region permissions and requirementsHimanshu Chauhan1-2/+10
Updated the various permissions bits available for domains defined in DT node and restrictions on them. Signed-off-by: Himanshu Chauhan <hchauhan@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Anup Patel <anup@brainfault.org>
2023-01-09docs: domain_support: Use capital letter for privilege modesBin Meng1-2/+2
The RISC-V convention for the privilege mode is capital letter, like 'M-mode', instead of 'm-mode'. Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-24docs: pmu: Update the pmu doc with removal of mcountinhbit restrictionAtish Patra1-3/+0
Since commit b28f070, it is possible for platforms to run perf monitoring even if mcountinhibit is not supported. Sampling still won't be possible though as it requires sscofpmf extension. Update the docs to remove the restriction. Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-24docs: pmu: update a reference to a deprecated property nameConor Dooley1-1/+1
event-to-mhpmevent was deprecated and replaced by riscv,event-to-mhpmevent, but a reference remains to the old name. Replace it with the new one. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-24docs: pmu: fix binding exampleConor Dooley1-3/+3
The first PMU binding example does not terminate properties with a ;, which is invalid. Noticed while converting the binding to yaml. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-12docs: platform: Add documentation for Renesas RZ/Five SoCLad Prabhakar3-0/+167
This patch adds documentation to build Renesas RZ/Five (R9A07G043F) SoC. Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05docs: andes-ae350.md: fix watchdog nodename in dts exampleYu Chien Peter Lin1-1/+1
The example should use watchdog as nodename instead of wdt. This is defined in watchdog common schemas: https://github.com/torvalds/linux/blob/v6.0/Documentation/devicetree/bindings/watchdog/watchdog.yaml#L19 Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-12-05docs: platform: Update AE350 and generic platform documentationYu Chien Peter Lin2-2/+5
Update compile option and platform compatible string for AE350 and add it to the generic platform list. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-11-14docs: fix some typoszhangdongdong5-5/+5
Corrected the typos of some documents in the 'docs' folder. Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23docs/firmware: update the documentYangjie Zhang2-2/+2
Since commit 9c07c513aa9b ("firmware:Remove FW_PAYLOAD_FDT_PATH compile-time option"), the section where FDT would be embedded in has changed from *.text* to *.rodata*, but some places in fw_payload.md and fw.md are still *.text*. This patch updates the document. Signed-off-by: Yangjie Zhang <pyjmstr@gmail.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-23docs: andes-ae350.md: Update ae350 documentation for fdt driver supportYu Chien Peter Lin1-4/+180
We update ae350 documentation to add details about platform device tree. The nodes and their properties must be provided to properly initialize data of underlying hardware and access their mmio registers. Signed-off-by: Yu Chien Peter Lin <peterlin@andestech.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-13docs: Fix some typoszhangdongdong4-10/+10
We fix few typos in documentation. Signed-off-by: zhangdongdong <zhangdongdong@eswincomputing.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-10-13docs/firmware: Update FW_JUMP documentationNylon.Chen1-0/+16
Add a tip for OpenSBI's FW_JUMP which helps users avoid overwriting the kernel. Signed-off-by: Nylon Chen <nylon.chen@sifive.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-09-13docs: pmu: extend bindings example for UnmatchedNikita Shubin1-0/+30
Extend example for Unmatched board to provide SBI PMU bindings for generalized and cache event's where they are applicable. Signed-off-by: Nikita Shubin <n.shubin@yadro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-09-13docs: pmu: fix Unmatched example typoNikita Shubin1-3/+3
bitmap for MHPMCOUNTERx should be 0x18 and not 0x0c, we check against SBI_PMU_FIXED_CTR_MASK which assumes than first 3 bits are dedicated to mcycle, mtime and minstret, u74 has 2 hardware counters. Reported-by: Zhang Xin <zhangxin.xa@gmail.com> Signed-off-by: Nikita Shubin <n.shubin@yadro.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-08-08docs: Update documentation for kconfig supportAnup Patel5-12/+13
We update all documentation files to: 1) Remove references to platform specific config.mk file since it is has been removed. 2) Add details about platform specific configs/defconfig and Kconfig files mandatory for each platform. 3) Add required packages in top-level README.md 4) Fix typo releated to object.mk in docs/platform/platform.md Signed-off-by: Anup Patel <apatel@ventanamicro.com> Reviewed-by: Andrew Jones <ajones@ventanamicro.com> Tested-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Atish Patra <atishp@rivosinc.com> Tested-by: Atish Patra <atishp@rivosinc.com>
2022-08-08Makefile: Compile lib/utils sources separately for each platformAnup Patel1-5/+1
Currently, if same build directory is used to compile two different platforms then lib/utils objects are shared for these platforms. We will be having platform specific configs to enable/disable drivers in lib/utils and select compile time options for lib/utils sources. This means lib/utils sources will now be compiled in a platform specific way. To tackle above, we update top-level Makefile as follows: 1) Don't create libsbiutils.a anymore because this can't be shared between platforms. 2) Compile lib/utils sources separately for each platform. 3) Add comments showing which make rules are for lib/sbi, lib/utils, firmware, and platform sources. Signed-off-by: Anup Patel <apatel@ventanamicro.com> Tested-by: Andrew Jones <ajones@ventanamicro.com> Acked-by: Atish Patra <atishp@rivosinc.com> Tested-by: Atish Patra <atishp@rivosinc.com>
2022-06-21lib: utils/timer: Add a separate compatible for the D1 CLINTSamuel Holland1-3/+1
The CLINT in the Allwinner D1 SoC apparently does not support 64-bit MMIO access. A property was added to support this quirk (and that property was copied to the ACLINT MTIMER code). However, since this difference in behavior makes the D1 CLINT incompatible with the SiFive CLINT's programming interface, a better solution is to use a separate compatible string. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Anup Patel <anup@brainfault.org>
2022-04-28docs: pmu: Improve the PMU DT bindingsAtish Patra1-18/+31
The current DT binding description is misleading and confusing. Clarify the text and provide more examples. Signed-off-by: Atish Patra <atishp@rivosinc.com> Reviewed-by: Anup Patel <anup@brainfault.org>
2021-12-11docs/platform: spike: Enhance Spike examplesTsukasa OI1-1/+12
This commit makes Spike usable as QEMU (in fact, those are based on QEMU examples). Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-12-03lib: pmu: support the event ID encoded by a bitmap.Vincent Chen1-8/+16
RISC-V privilege specification does not specify how to encode the event ID. Therefore, each platform is allowed to customize its own encoding rule. The common encoding methods are as follow, directly assigning a number to an event, or every bit in the mphmevent CSR controls one specified event or mixes the above two methods. To enable OpenSBI to support the above three encoding methods simultaneously, this patch repurpose the dt property "riscv,raw-event-to-mhpmcounters". The "riscv,raw-event-to-mhpmcounters" will describes the one or multiple raw events that could be counted by a set of counters. But, the column number of "riscv,raw-event-to-mhpmcounters" is extended from 2 to 3. The 1st column (64bit) is the ID of the raw events. The 2nd column (64bit) represents a select_mask now to represent the bits used for event ID encoding. If a platform directly encodes each raw PMU event as a unique ID, the value of select_mask will be 0xffffffff_ffffffff. Signed-off-by: Vincent Chen <vincent.chen@sifive.com> Signed-off-by: Atish Patra<atishp@rivosinc.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-11-11lib: utils: Rename the prefix in PMU DT propertiesAtish Patra1-6/+6
As per the DT schema rules, the prefix should be vendor. As the PMU properties are generic for all vendors, change the prefix to riscv instead of pmu. Reviewed-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-10-21lib: utils/irqchip: Automatically delegate T-HEAD PLIC accessOpenSBI-v0.9-78c2b19Samuel Holland1-9/+3
The T-HEAD PLIC implementation requires setting a delegation bit to allow access from S-mode. Now that the T-HEAD PLIC has its own compatible string, set this bit automatically from the PLIC driver, instead of reaching into the PLIC's MMIO space from another driver. Signed-off-by: Samuel Holland <samuel@sholland.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-17docs: Document FW_PIC compile time optionBin Meng1-0/+6
FW_PIC=y is on by default, but the doc is missing when this was introduced. Add some description for it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-17docs: Document parameters passed to firmware and alignment requirementBin Meng2-2/+10
This updates documentation to describe parameters passed to firmware from previous booting stage, and corresponding address alignment requirement. This also fixes a typo in fw_dynamic.md (it's => its). Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11docs: Make <xyz> visible in the rendered platform guideBin Meng1-8/+8
At present in the rendered platform guide, all instances of <xyz> are missing. Use &lt; and &gt; to replace <> to make them visible. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11docs: Correct a typo in platform_guide.mdBin Meng1-1/+1
It's riscv-pk, not riskv-pk. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Xiang W <wxjstz@126.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-07-11docs: Add device tree bindings for SBI PMU extensionAtish Patra1-0/+79
SBI PMU extension requires a firmware to be aware of the event to counter/mhpmevent mappings supported by the hardware. One approach is to encode that information in the device tree. Define a device tree binding that allows a hardware to describe all the PMU mappings required in concise format. Reviewed-by: Anup Patel <anup.patel@wdc.com> Signed-off-by: Atish Patra <atish.patra@wdc.com>
2021-07-06docs/platform: thead-c9xx: Remove FW_PIC=yBin Meng1-1/+1
FW_PIC is on by default. Hence no need to explicitly require it. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-06-11docs/platform: andes-ae350: Fix missing spacesBin Meng1-3/+3
Fix several places in the docmentation that are missing spaces. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-06-02docs: debugging OpenSBIHeinrich Schuchardt1-0/+24
Describe how to debug OpenSBI on QEMU with GDB. Signed-off-by: Heinrich Schuchardt <xypron.glpk@gmx.de> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2021-05-06docs: platform: Describe sifive_fu540 as supported generic platformBin Meng2-8/+10
The upstream U-Boot/QEMU have been using generic platform for SiFive HiFive Unleashed board for some time. Let's document sifive_fu540 as one of the supported targets for "generic" platform. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-05-06docs: platform: Sort platform namesBin Meng1-2/+2
Let's sort the platform names in alphabetical order. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-29docs/platform: sifive_fu540: Update U-Boot defconfig nameBin Meng1-5/+6
With latest U-Boot upstream (v2021.07 in development), the defconfig name has been changed to sifive_unleashed_defconfig. Update the doc. Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28docs: generic: Add T-HEAD C9xx series processorsGuo Ren2-0/+206
Add description and dts examples for T-HEAD C9xx platforms. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-28platform: Remove platform/theadGuo Ren2-37/+0
We could use platform/generic instead, and won't use platform/thead/c910 again. Signed-off-by: Guo Ren <guoren@linux.alibaba.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2021-04-12docs: fix link to OpenPiton documentationhasheddan1-2/+2
Updates link in platforms documentation to point to the correct OpenPiton document. Signed-off-by: hasheddan <georgedanielmangum@gmail.com> Reviewed-by: Anup Patel <anup.patel@wdc.com>
2020-12-04docs: Add domain device tree binding documentationAnup Patel1-0/+208
This patch adds domain device tree binding documentation in the OpenSBI domain support documentation. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-11-27docs: fix a typo errorYuan Li1-1/+1
fix a typo error in docs/platform/sifive_fu540.md Signed-off-by: Yuan Li <dskwelmcy@163.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-21docs: Add initial documentation for domain supportAnup Patel2-0/+107
We add initial documentation for OpenSBI domain support to help RISC-V platform vendors achieve system-level partitioning. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-18firmware: Remove FW_PAYLOAD_FDT_PATH compile-time optionAnup Patel4-14/+9
The FW_PAYLOAD_FDT_PATH compile-time option is replaced by FW_FDT_PATH compile-time option which is more flexible and common across all OpenSBI firmwares. This patch removes FW_PAYLOAD_FDT_PATH and updates related documentation to use FW_FDT_PATH. Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-10-18firmware: Add common FW_FDT_PATH compile-time optionAnup Patel1-5/+11
Currently, only FW_PAYLOAD has mechanism to embed external FDT using FW_PAYLOAD_FDT_PATH compile-time option. This patch adds a common FW_FDT_PATH compile-time option to embed external FDT for all OpenSBI firmwares (i.e FW_JUMP, FW_PAYLOAD, and FW_DYNAMIC). Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-29docs/platform: sifive_fu540: Update U-Boot instructionsBin Meng1-5/+30
U-Boot v2020.07 release adds SPL support to SiFive HiFive Unleashed. Update the doc to mention that detailed build instructions are in the U-Boot doc. This also adds detailed command line description to show how to boot U-Boot v2020.07 S-mode payload in the QEMU chapter. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
2020-06-29docs/platform: Update QEMU parameter for fw_payloadBin Meng2-8/+8
Since QEMU v5.1, if there is no "-bios" option provided, the default OpenSBI firmware will be loaded by QEMU as the BIOS automatically, hence to load fw_payload type image, we should explicitly pass the "-bios" option to QEMU. Signed-off-by: Bin Meng <bin.meng@windriver.com> Reviewed-by: Atish Patra <atish.patra@wdc.com>
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