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| author | andy.hu <andy.hu@starfivetech.com> | 2023-12-06 12:54:47 +0300 |
|---|---|---|
| committer | andy.hu <andy.hu@starfivetech.com> | 2023-12-06 12:54:47 +0300 |
| commit | 8c7b3f31fb546f829bbce9ee52435342314fabbf (patch) | |
| tree | e5baac847a003735d78956746fe70a9746baee1a | |
| parent | 918eb904cfbc79a48552fe4c842938a94fd3c1d5 (diff) | |
| parent | f9d4424a161e5fc34dde23bd2984e93efc152a8f (diff) | |
| download | u-boot-8c7b3f31fb546f829bbce9ee52435342314fabbf.tar.xz | |
Merge branch 'CR_8638_dts_i2c5_hal.feng' into 'jh7110-master'JH7110_VF2_6.1_v5.10.3JH7110_VF2_515_v5.10.3
CR_8638_dts_i2c5_hal.feng
See merge request sdk/u-boot!75
| -rw-r--r-- | arch/riscv/dts/jh7110.dtsi | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index d8f62454fd..f3f830f5f3 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -688,7 +688,7 @@ status = "disabled"; }; - i2c5: i2c@12050000 { + i2c5: i2c5@12050000 { compatible = "snps,designware-i2c"; reg = <0x0 0x12050000 0x0 0x10000>; clocks = <&clkgen JH7110_I2C5_CLK_CORE>, |