diff options
| author | Tom Rini <trini@konsulko.com> | 2022-11-20 02:45:34 +0300 |
|---|---|---|
| committer | Tom Rini <trini@konsulko.com> | 2022-12-06 00:08:37 +0300 |
| commit | 8ce59b5932946b10d5abdd4b06577e7413bbec13 (patch) | |
| tree | 7d1b8484cb81908b87fa23c5773dd4861409fac3 | |
| parent | d91365203c06e0fbfa329e707196e9aa51241e4c (diff) | |
| download | u-boot-8ce59b5932946b10d5abdd4b06577e7413bbec13.tar.xz | |
Convert CONFIG_SPD_EEPROM to Kconfig
This converts the following to Kconfig:
CONFIG_SPD_EEPROM
Cc: Stefan Roese <sr@denx.de>
Signed-off-by: Tom Rini <trini@konsulko.com>
| -rw-r--r-- | README | 7 | ||||
| -rw-r--r-- | configs/MPC8548CDS_36BIT_defconfig | 1 | ||||
| -rw-r--r-- | configs/MPC8548CDS_defconfig | 1 | ||||
| -rw-r--r-- | configs/MPC8548CDS_legacy_defconfig | 1 | ||||
| -rw-r--r-- | configs/socrates_defconfig | 1 | ||||
| -rw-r--r-- | drivers/ddr/Kconfig | 8 | ||||
| -rw-r--r-- | include/configs/MPC8548CDS.h | 1 | ||||
| -rw-r--r-- | include/configs/db-mv784mp-gp.h | 3 | ||||
| -rw-r--r-- | include/configs/socrates.h | 1 |
9 files changed, 12 insertions, 12 deletions
@@ -1683,13 +1683,6 @@ Low Level (hardware related) configuration options: Sets the EBC0_CFG register for the NDFC. If not defined a default value will be used. -- CONFIG_SPD_EEPROM - Get DDR timing information from an I2C EEPROM. Common - with pluggable memory modules such as SODIMMs - - SPD_EEPROM_ADDRESS - I2C address of the SPD EEPROM - - CONFIG_SYS_SPD_BUS_NUM If SPD EEPROM is on an I2C bus other than the first one, specify here. Note that the value must resolve diff --git a/configs/MPC8548CDS_36BIT_defconfig b/configs/MPC8548CDS_36BIT_defconfig index 86a67d7b21..517fd785dd 100644 --- a/configs/MPC8548CDS_36BIT_defconfig +++ b/configs/MPC8548CDS_36BIT_defconfig @@ -45,6 +45,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" +CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/MPC8548CDS_defconfig b/configs/MPC8548CDS_defconfig index 2ac4f26685..5c83e808d5 100644 --- a/configs/MPC8548CDS_defconfig +++ b/configs/MPC8548CDS_defconfig @@ -44,6 +44,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" +CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/MPC8548CDS_legacy_defconfig b/configs/MPC8548CDS_legacy_defconfig index faabd7bc04..b354237db3 100644 --- a/configs/MPC8548CDS_legacy_defconfig +++ b/configs/MPC8548CDS_legacy_defconfig @@ -44,6 +44,7 @@ CONFIG_USE_BOOTFILE=y CONFIG_BOOTFILE="8548cds/uImage.uboot" CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="eTSEC0" +CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_DDR_ECC=y CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y diff --git a/configs/socrates_defconfig b/configs/socrates_defconfig index ab52ea26a0..f45f570764 100644 --- a/configs/socrates_defconfig +++ b/configs/socrates_defconfig @@ -57,6 +57,7 @@ CONFIG_SYS_REDUNDAND_ENVIRONMENT=y CONFIG_ENV_ADDR_REDUND=0xFFF20000 CONFIG_USE_ETHPRIME=y CONFIG_ETHPRIME="TSEC0" +CONFIG_SPD_EEPROM=y CONFIG_CHIP_SELECTS_PER_CTRL=2 CONFIG_SYS_BR0_PRELIM_BOOL=y CONFIG_SYS_BR0_PRELIM=0xFE001001 diff --git a/drivers/ddr/Kconfig b/drivers/ddr/Kconfig index 738b788401..fa873cc487 100644 --- a/drivers/ddr/Kconfig +++ b/drivers/ddr/Kconfig @@ -37,3 +37,11 @@ config SYS_SPD_BUS_NUM source "drivers/ddr/altera/Kconfig" source "drivers/ddr/imx/Kconfig" + +config SPD_EEPROM + bool "DDR controller makes use of an SPD EEPROM for JEDEC information" + depends on SYS_FSL_DDR || SYS_FSL_MMDC || CONFIG_ARMADA_XP + help + Get DDR timing information from an I2C EEPROM. Common with pluggable + memory modules such as SODIMMs. You must define SPD_EEPROM_ADDRESS + to the I2C address of the SPD EEPROM. diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h index 83eb18c3b7..780ee5ae86 100644 --- a/include/configs/MPC8548CDS.h +++ b/include/configs/MPC8548CDS.h @@ -30,7 +30,6 @@ #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup*/ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef diff --git a/include/configs/db-mv784mp-gp.h b/include/configs/db-mv784mp-gp.h index 7b305955c9..bf8b35102a 100644 --- a/include/configs/db-mv784mp-gp.h +++ b/include/configs/db-mv784mp-gp.h @@ -45,7 +45,4 @@ /* SPL */ /* Defines for SPL */ -/* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_SPD_EEPROM 0x4e - #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/socrates.h b/include/configs/socrates.h index 0a2d581517..95393d3ab2 100644 --- a/include/configs/socrates.h +++ b/include/configs/socrates.h @@ -50,7 +50,6 @@ #define CFG_SYS_CCSRBAR_PHYS_LOW CFG_SYS_CCSRBAR /* DDR Setup */ -#define CONFIG_SPD_EEPROM /* Use SPD EEPROM for DDR setup */ #define CONFIG_MEM_INIT_VALUE 0xDeadBeef |