diff options
| author | Adam Ford <aford173@gmail.com> | 2022-10-22 16:43:44 +0300 |
|---|---|---|
| committer | Stefano Babic <sbabic@denx.de> | 2022-11-08 00:45:04 +0300 |
| commit | a5685ea4882f68ac5b34d5e8613e357962f55e9d (patch) | |
| tree | 366dad5691474db857eea022e29c0a990359c064 | |
| parent | 4dbe07f275b8d6449d1b61f181f442b5a9ade35f (diff) | |
| download | u-boot-a5685ea4882f68ac5b34d5e8613e357962f55e9d.tar.xz | |
imx: imx8mn-beacon: Fix out of spec voltage
The DDR is configured for LPDDR4 running at 1.6GHz which requires
the voltage on the PMIC to rise a bit before initializing LPDDR4
or it will be running out of spec.
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
| -rw-r--r-- | board/beacon/imx8mn/spl.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/board/beacon/imx8mn/spl.c b/board/beacon/imx8mn/spl.c index 029f71bc99..9acd916180 100644 --- a/board/beacon/imx8mn/spl.c +++ b/board/beacon/imx8mn/spl.c @@ -74,6 +74,38 @@ static iomux_v3_cfg_t const pwm_pads[] = { IMX8MN_PAD_GPIO1_IO01__PWM1_OUT | MUX_PAD_CTRL(PWM1_PAD_CTRL), }; +static int power_init_board(void) +{ + struct udevice *dev; + int ret; + + ret = pmic_get("pmic@4b", &dev); + if (ret == -ENODEV) { + puts("No pmic\n"); + return 0; + } + + if (ret != 0) + return ret; + + /* decrease RESET key long push time from the default 10s to 10ms */ + pmic_reg_write(dev, BD718XX_PWRONCONFIG1, 0x0); + + /* unlock the PMIC regs */ + pmic_reg_write(dev, BD718XX_REGLOCK, 0x1); + + /* increase VDD_SOC to typical value 0.85v before first DRAM access */ + pmic_reg_write(dev, BD718XX_BUCK1_VOLT_RUN, 0x0f); + + /* increase VDD_DRAM to 0.975v for 3Ghz DDR */ + pmic_reg_write(dev, BD718XX_1ST_NODVS_BUCK_VOLT, 0x83); + + /* lock the PMIC regs */ + pmic_reg_write(dev, BD718XX_REGLOCK, 0x11); + + return 0; +} + int board_early_init_f(void) { /* Claiming pwm pins prevents LCD flicker during startup*/ @@ -107,6 +139,9 @@ void board_init_f(ulong dummy) enable_tzc380(); + /* LPDDR4 at 1.6GHz requires a voltage adjustment on the PMIC */ + power_init_board(); + /* DDR initialization */ spl_dram_init(); |