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authorPali Rohár <pali@kernel.org>2021-11-26 13:42:47 +0300
committerTom Rini <trini@konsulko.com>2022-01-12 22:21:24 +0300
commitf031f07f3abe2c611b03d733f23b6fd459d9d6dd (patch)
tree72c2550d668b2d902b890501a8b7711b798d83ad
parent86be29e9d985b57e03e2eede6394e0c1edc6660a (diff)
downloadu-boot-f031f07f3abe2c611b03d733f23b6fd459d9d6dd.tar.xz
pci: fsl: Use PCI_CONF1_EXT_ADDRESS() macro
PCI fsl driver uses extended format of Config Address for PCI Configuration Mechanism #1. So use new U-Boot macro PCI_CONF1_EXT_ADDRESS(). Signed-off-by: Pali Rohár <pali@kernel.org> Reviewed-by: Simon Glass <sjg@chromium.org>
-rw-r--r--drivers/pci/pcie_fsl.c10
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 3c2a2a4761..cc6efdd5b4 100644
--- a/drivers/pci/pcie_fsl.c
+++ b/drivers/pci/pcie_fsl.c
@@ -58,8 +58,9 @@ static int fsl_pcie_read_config(const struct udevice *bus, pci_dev_t bdf,
return 0;
}
- bdf = bdf - PCI_BDF(dev_seq(bus), 0, 0);
- val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000;
+ val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf) - dev_seq(bus),
+ PCI_DEV(bdf), PCI_FUNC(bdf),
+ offset);
out_be32(&regs->cfg_addr, val);
sync();
@@ -94,8 +95,9 @@ static int fsl_pcie_write_config(struct udevice *bus, pci_dev_t bdf,
if (fsl_pcie_addr_valid(pcie, bdf))
return 0;
- bdf = bdf - PCI_BDF(dev_seq(bus), 0, 0);
- val = bdf | (offset & 0xfc) | ((offset & 0xf00) << 16) | 0x80000000;
+ val = PCI_CONF1_EXT_ADDRESS(PCI_BUS(bdf) - dev_seq(bus),
+ PCI_DEV(bdf), PCI_FUNC(bdf),
+ offset);
out_be32(&regs->cfg_addr, val);
sync();