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| author | Michal Simek <michal.simek@xilinx.com> | 2019-05-27 11:13:34 +0300 |
|---|---|---|
| committer | Michal Simek <michal.simek@xilinx.com> | 2019-10-08 10:41:27 +0300 |
| commit | a6af30908bd61f3aa77f78c463834eb2f635670f (patch) | |
| tree | 5ef772c5a4d8a7d29adc8e2a89fec03a1ed5d0fc /arch/arm/dts/zynq-cse-qspi-single.dts | |
| parent | 134b0c8d6a8ed07b9b382792c24ca9ecce56106d (diff) | |
| download | u-boot-a6af30908bd61f3aa77f78c463834eb2f635670f.tar.xz | |
ARM: zynq: Align model name with DT
Use model property to distinguish different configurations.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Diffstat (limited to 'arch/arm/dts/zynq-cse-qspi-single.dts')
| -rw-r--r-- | arch/arm/dts/zynq-cse-qspi-single.dts | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/arch/arm/dts/zynq-cse-qspi-single.dts b/arch/arm/dts/zynq-cse-qspi-single.dts index 0d680dfc06..ac6982a74e 100644 --- a/arch/arm/dts/zynq-cse-qspi-single.dts +++ b/arch/arm/dts/zynq-cse-qspi-single.dts @@ -7,6 +7,10 @@ #include "zynq-cse-qspi.dtsi" +/ { + model = "Zynq CSE QSPI SINGLE Board"; +}; + &flash0 { spi-rx-bus-width = <4>; }; |