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author | Tom Rini <trini@konsulko.com> | 2021-07-01 15:57:23 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2021-07-01 15:57:23 +0300 |
commit | 6b69f15fd6386770b6fe782a4a8b4ce9243e2327 (patch) | |
tree | ad79b9e1ef596dd0f0c2b0b878179535545c8d97 /arch/arm/dts/zynqmp-zcu100-revC.dts | |
parent | 90c2fd2af8189e2e2682c90cd72a48b65191b467 (diff) | |
parent | 45576273e9209309238f332c85a6fef955c49b59 (diff) | |
download | u-boot-6b69f15fd6386770b6fe782a4a8b4ce9243e2327.tar.xz |
Merge tag 'xilinx-for-v2021.10' of https://source.denx.de/u-boot/custodians/u-boot-microblaze into next
Xilinx changes for v2021.10
clk:
- Add driver for Xilinx Clocking Wizard IP
fdt:
- Also record architecture in /fit-images
net:
- Fix plat/priv data handling in axi emac
- Add support for 10G/25G speeds
pca953x:
- Add missing dependency on i2c
serial:
- Fix dependencies for DEBUG uart for pl010/pl011
- Add setconfig option for cadence serial driver
watchdog:
- Add cadence wdt expire now function
zynq:
- Update DT bindings to reflect the latest state and descriptions
zynqmp:
- Update DT bindings to reflect the latest state and descriptions
- SPL: Add support for ECC DRAM initialization
- Fix R5 core 1 handling logic
- Enable firmware driver for mini configurations
- Enable secure boot, regulators, wdt
- Add support xck devices and 67dr
- Add psu init for sm/smk-k26 SOMs
- Add handling for MMC seq number via mmc_get_env_dev()
- Handle reserved memory locations
- Add support for u-boot.itb generation for secure OS
- Handle BL32 handoffs for secure OS
- Add support for 64bit addresses for u-boot.its generation
- Change eeprom handling via nvmem aliases
Diffstat (limited to 'arch/arm/dts/zynqmp-zcu100-revC.dts')
-rw-r--r-- | arch/arm/dts/zynqmp-zcu100-revC.dts | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/arm/dts/zynqmp-zcu100-revC.dts b/arch/arm/dts/zynqmp-zcu100-revC.dts index b83696cccd..2d61577478 100644 --- a/arch/arm/dts/zynqmp-zcu100-revC.dts +++ b/arch/arm/dts/zynqmp-zcu100-revC.dts @@ -2,7 +2,7 @@ /* * dts file for Xilinx ZynqMP ZCU100 revC * - * (C) Copyright 2016 - 2020, Xilinx, Inc. + * (C) Copyright 2016 - 2021, Xilinx, Inc. * * Michal Simek <michal.simek@xilinx.com> * Nathalie Chan King Choy @@ -23,7 +23,6 @@ compatible = "xlnx,zynqmp-zcu100-revC", "xlnx,zynqmp-zcu100", "xlnx,zynqmp"; aliases { - gpio0 = &gpio; i2c0 = &i2c1; rtc0 = &rtc; serial0 = &uart1; @@ -132,13 +131,13 @@ io-channels = <&u35 0>, <&u35 1>, <&u35 2>, <&u35 3>; }; - si5335a_0: clk26 { + si5335_0: si5335_0 { /* clk0_usb - u23 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <26000000>; }; - si5335a_1: clk27 { + si5335_1: si5335_1 { /* clk1_dp - u23 */ compatible = "fixed-clock"; #clock-cells = <0>; clock-frequency = <27000000>; @@ -485,8 +484,8 @@ &psgtr { status = "okay"; - /* usb3, dps */ - clocks = <&si5335a_0>, <&si5335a_1>; + /* usb3, dp */ + clocks = <&si5335_0>, <&si5335_1>; clock-names = "ref0", "ref1"; }; |