diff options
| author | Kever Yang <kever.yang@rock-chips.com> | 2019-07-22 15:02:10 +0300 |
|---|---|---|
| committer | Kever Yang <kever.yang@rock-chips.com> | 2019-07-29 05:26:41 +0300 |
| commit | 1e7d2be011c2f51e62d3096a7bd808f9d4feb2ca (patch) | |
| tree | 788063ac2edf2f0c98cbe3c3e5e2fd0fa1b16b91 /arch/arm/mach-rockchip/rk3288 | |
| parent | a97b65a7a0b907a9ac8920a24137dbe802e41ef8 (diff) | |
| download | u-boot-1e7d2be011c2f51e62d3096a7bd808f9d4feb2ca.tar.xz | |
rockchip: rk3288: move SOC setting into arch_cpu_init()
Qos setting and emmc relate SoC setting should go to arch_cpu_init().
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Diffstat (limited to 'arch/arm/mach-rockchip/rk3288')
| -rw-r--r-- | arch/arm/mach-rockchip/rk3288/rk3288.c | 28 |
1 files changed, 28 insertions, 0 deletions
diff --git a/arch/arm/mach-rockchip/rk3288/rk3288.c b/arch/arm/mach-rockchip/rk3288/rk3288.c index b80193012a..4a1db99ac4 100644 --- a/arch/arm/mach-rockchip/rk3288/rk3288.c +++ b/arch/arm/mach-rockchip/rk3288/rk3288.c @@ -2,12 +2,14 @@ /* * Copyright (c) 2016 Rockchip Electronics Co., Ltd */ +#include <common.h> #include <asm/armv7.h> #include <asm/io.h> #include <asm/arch-rockchip/bootrom.h> #include <asm/arch-rockchip/hardware.h> #include <asm/arch-rockchip/grf_rk3288.h> #include <asm/arch-rockchip/pmu_rk3288.h> +#include <asm/arch-rockchip/qos_rk3288.h> #include <asm/arch-rockchip/sdram_common.h> DECLARE_GLOBAL_DATA_PTR; @@ -40,6 +42,24 @@ static void configure_l2ctlr(void) } #endif +int rk3288_qos_init(void) +{ + int val = 2 << PRIORITY_HIGH_SHIFT | 2 << PRIORITY_LOW_SHIFT; + /* set vop qos to higher priority */ + writel(val, CPU_AXI_QOS_PRIORITY + VIO0_VOP_QOS); + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_VOP_QOS); + + if (!fdt_node_check_compatible(gd->fdt_blob, 0, + "rockchip,rk3288-tinker")) { + /* set isp qos to higher priority */ + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_R_QOS); + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W0_QOS); + writel(val, CPU_AXI_QOS_PRIORITY + VIO1_ISP_W1_QOS); + } + + return 0; +} + int arch_cpu_init(void) { #ifdef CONFIG_SPL_BUILD @@ -50,6 +70,14 @@ int arch_cpu_init(void) /* Use rkpwm by default */ rk_setreg(&grf->soc_con2, 1 << 0); + + /* + * Disable JTAG on sdmmc0 IO. The SDMMC won't work until this bit is + * cleared + */ + rk_clrreg(&grf->soc_con0, 1 << 12); + + rk3288_qos_init(); #endif return 0; |