diff options
author | Tom Rini <trini@konsulko.com> | 2016-08-11 17:45:53 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2016-08-11 17:45:53 +0300 |
commit | 28cd88baa3f11cdb52be3b6d0610dcf32c60871a (patch) | |
tree | 4d6150effe763b043c7e30499c8ec2061df81be1 /arch/arm/mach-uniphier/arm32/lowlevel_init.S | |
parent | 2f1eb66e2881a780e622e7fd50b3a497677fd373 (diff) | |
parent | e8a9293295a1a54f6e43970bed2d3bfd124be02c (diff) | |
download | u-boot-28cd88baa3f11cdb52be3b6d0610dcf32c60871a.tar.xz |
Merge branch 'master' of git://git.denx.de/u-boot-uniphier
Diffstat (limited to 'arch/arm/mach-uniphier/arm32/lowlevel_init.S')
-rw-r--r-- | arch/arm/mach-uniphier/arm32/lowlevel_init.S | 61 |
1 files changed, 31 insertions, 30 deletions
diff --git a/arch/arm/mach-uniphier/arm32/lowlevel_init.S b/arch/arm/mach-uniphier/arm32/lowlevel_init.S index 8e32b35723..af5ed1c050 100644 --- a/arch/arm/mach-uniphier/arm32/lowlevel_init.S +++ b/arch/arm/mach-uniphier/arm32/lowlevel_init.S @@ -11,8 +11,6 @@ #include <linux/sizes.h> #include <asm/system.h> -#include "ssc-regs.h" - ENTRY(lowlevel_init) mov r8, lr @ persevere link reg across call @@ -27,10 +25,6 @@ ENTRY(lowlevel_init) orr r0, r0, #(CR_C | CR_M) @ enable MMU and Dcache mcr p15, 0, r0, c1, c0, 0 -#ifdef CONFIG_DEBUG_LL - bl debug_ll_init -#endif - bl setup_init_ram @ RAM area for stack and page table /* @@ -49,6 +43,10 @@ ENTRY(lowlevel_init) bl enable_mmu +#ifdef CONFIG_DEBUG_LL + bl debug_ll_init +#endif + mov lr, r8 @ restore link mov pc, lr @ back to my caller ENDPROC(lowlevel_init) @@ -88,39 +86,42 @@ ENDPROC(enable_mmu) */ #define BOOT_RAM_SIZE (SZ_32K) #define BOOT_RAM_BASE ((CONFIG_SPL_STACK) - (BOOT_RAM_SIZE)) -#define BOOT_WAY_BITS (0x00000100) /* way 8 */ +#define BOOT_RAM_WAYS (0x00000100) @ way 8 + +#define SSCO_BASE 0x506c0000 +#define SSCOPE 0x244 +#define SSCOQM 0x248 +#define SSCOQAD 0x24c +#define SSCOQSZ 0x250 +#define SSCOQWN 0x258 +#define SSCOPPQSEF 0x25c +#define SSCOLPQS 0x260 ENTRY(setup_init_ram) - /* - * Touch to zero for the boot way - */ -0: - /* - * set UNIPHIER_SSCOQM, UNIPHIER_SSCOQAD, UNIPHIER_SSCOQSZ, UNIPHIER_SSCOQWN in this order - */ - ldr r0, = 0x00408006 @ touch to zero with address range - ldr r1, = UNIPHIER_SSCOQM - str r0, [r1] + ldr r1, = SSCO_BASE + mrc p15, 0, r0, c2, c0, 0 @ TTBR0 + ldr r0, [r0, #0x400] @ entry for virtual address 0x100***** + bfc r0, #0, #20 + cmp r0, #0x50000000 @ is sLD3 page table? + biceq r1, r1, #0xc0000000 @ sLD3 ROM maps 0x5******* to 0x1******* + + /* Touch to zero for the boot way */ +0: ldr r0, = 0x00408006 @ touch to zero with address range + str r0, [r1, #SSCOQM] ldr r0, = BOOT_RAM_BASE - ldr r1, = UNIPHIER_SSCOQAD - str r0, [r1] + str r0, [r1, #SSCOQAD] ldr r0, = BOOT_RAM_SIZE - ldr r1, = UNIPHIER_SSCOQSZ - str r0, [r1] - ldr r0, = BOOT_WAY_BITS - ldr r1, = UNIPHIER_SSCOQWN - str r0, [r1] - ldr r1, = UNIPHIER_SSCOPPQSEF - ldr r0, [r1] + str r0, [r1, #SSCOQSZ] + ldr r0, = BOOT_RAM_WAYS + str r0, [r1, #SSCOQWN] + ldr r0, [r1, #SSCOPPQSEF] cmp r0, #0 @ check if the command is successfully set bne 0b @ try again if an error occurs - ldr r1, = UNIPHIER_SSCOLPQS -1: - ldr r0, [r1] +1: ldr r0, [r1, #SSCOLPQS] cmp r0, #0x4 bne 1b @ wait until the operation is completed - str r0, [r1] @ clear the complete notification flag + str r0, [r1, #SSCOLPQS] @ clear the complete notification flag mov pc, lr ENDPROC(setup_init_ram) |