ARM: uniphier: collect clock/PLL init code into a single directory

Now PLLs for DRAM controller are initialized in SPL, and the others
in U-Boot proper.  Setting up all of them in a single directory will
be helpful when we want to share code between SPL and U-Boot proper.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

1 files changed, 34 insertions, 0 deletions

diff --git a/arch/arm/mach-uniphier/clk/early-clk-ld20.c b/arch/arm/mach-uniphier/clk/early-clk-ld20.c
new file mode 100644
index 0000000000..5201a55940
--- /dev/null
+++ b/arch/arm/mach-uniphier/clk/early-clk-ld20.c
@@ -0,0 +1,34 @@
+/*
+ * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
+ *
+ * SPDX-License-Identifier:	GPL-2.0+
+ */
+
+#include <linux/io.h>
+
+#include "../init.h"
+#include "../sc64-regs.h"
+
+int uniphier_ld20_early_clk_init(const struct uniphier_board_data *bd)
+{
+	u32 tmp;
+
+	/* deassert reset */
+	tmp = readl(SC_RSTCTRL7);
+	tmp |= SC_RSTCTRL7_UMCSB | SC_RSTCTRL7_UMCA2 | SC_RSTCTRL7_UMCA1 |
+		SC_RSTCTRL7_UMCA0 | SC_RSTCTRL7_UMC32 | SC_RSTCTRL7_UMC31 |
+		SC_RSTCTRL7_UMC30;
+	writel(tmp, SC_RSTCTRL7);
+
+	/* provide clocks */
+	tmp = readl(SC_CLKCTRL4);
+	tmp |= SC_CLKCTRL4_PERI;
+	writel(tmp, SC_CLKCTRL4);
+
+	tmp = readl(SC_CLKCTRL7);
+	tmp |= SC_CLKCTRL7_UMCSB | SC_CLKCTRL7_UMC32 | SC_CLKCTRL7_UMC31 |
+							SC_CLKCTRL7_UMC30;
+	writel(tmp, SC_CLKCTRL7);
+
+	return 0;
+}