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author | Tom Rini <trini@konsulko.com> | 2020-04-20 20:44:27 +0300 |
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committer | Tom Rini <trini@konsulko.com> | 2020-04-20 20:44:27 +0300 |
commit | e4837da7828293ea49abc579f939c0f5c4b127c3 (patch) | |
tree | 421407ac920910e309e3d704e10b45b8fc93396c /arch/arm | |
parent | 62c59545bad51936580012ee1cd2a728f1ca99fd (diff) | |
parent | 699a33b9388607446452ed3457921cfd61fc094e (diff) | |
download | u-boot-e4837da7828293ea49abc579f939c0f5c4b127c3.tar.xz |
Merge tag 'u-boot-amlogic-20200420' of https://gitlab.denx.de/u-boot/custodians/u-boot-amlogic
- enable DM_RNG on meson boards
- fix SMBIOS info on Odroid-C2
- Fix video output on GXBB/GXL/GXM boards
- add USB gadget support for GXL/GXM boards
Diffstat (limited to 'arch/arm')
-rw-r--r-- | arch/arm/Kconfig | 1 | ||||
-rw-r--r-- | arch/arm/dts/meson-gx-u-boot.dtsi | 4 | ||||
-rw-r--r-- | arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi | 7 | ||||
-rw-r--r-- | arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi | 6 | ||||
-rw-r--r-- | arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi | 2 | ||||
-rw-r--r-- | arch/arm/dts/meson-gxl-u-boot.dtsi | 23 | ||||
-rw-r--r-- | arch/arm/include/asm/arch-meson/usb-gx.h | 16 | ||||
-rw-r--r-- | arch/arm/mach-meson/board-gx.c | 118 |
9 files changed, 176 insertions, 3 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index dd41090fc6..33b484753c 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -762,6 +762,7 @@ config ARCH_OMAP2PLUS config ARCH_MESON bool "Amlogic Meson" imply DISTRO_DEFAULTS + imply DM_RNG help Support for the Meson SoC family developed by Amlogic Inc., targeted at media players and tablet computers. We currently diff --git a/arch/arm/dts/meson-gx-u-boot.dtsi b/arch/arm/dts/meson-gx-u-boot.dtsi index b84e5edba4..17d2cb95c1 100644 --- a/arch/arm/dts/meson-gx-u-boot.dtsi +++ b/arch/arm/dts/meson-gx-u-boot.dtsi @@ -11,6 +11,10 @@ }; &vpu { + reg = <0x0 0xd0100000 0x0 0x100000>, + <0x0 0xc883c000 0x0 0x1000>, + <0x0 0xc8838000 0x0 0x1000>; + reg-names = "vpu", "hhi", "dmc"; u-boot,dm-pre-reloc; }; diff --git a/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi b/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi new file mode 100644 index 0000000000..c35158d7e9 --- /dev/null +++ b/arch/arm/dts/meson-gxl-s805x-libretech-ac-u-boot.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson-gx-u-boot.dtsi" diff --git a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi index c35158d7e9..39270ea71c 100644 --- a/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi +++ b/arch/arm/dts/meson-gxl-s905x-khadas-vim-u-boot.dtsi @@ -4,4 +4,4 @@ * Author: Neil Armstrong <narmstrong@baylibre.com> */ -#include "meson-gx-u-boot.dtsi" +#include "meson-gxl-u-boot.dtsi" diff --git a/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi index c35158d7e9..474a3e1604 100644 --- a/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi +++ b/arch/arm/dts/meson-gxl-s905x-libretech-cc-u-boot.dtsi @@ -4,4 +4,8 @@ * Author: Neil Armstrong <narmstrong@baylibre.com> */ -#include "meson-gx-u-boot.dtsi" +#include "meson-gxl-u-boot.dtsi" + +&dwc2 { + status = "okay"; +}; diff --git a/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi b/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi index c35158d7e9..39270ea71c 100644 --- a/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi +++ b/arch/arm/dts/meson-gxl-s905x-p212-u-boot.dtsi @@ -4,4 +4,4 @@ * Author: Neil Armstrong <narmstrong@baylibre.com> */ -#include "meson-gx-u-boot.dtsi" +#include "meson-gxl-u-boot.dtsi" diff --git a/arch/arm/dts/meson-gxl-u-boot.dtsi b/arch/arm/dts/meson-gxl-u-boot.dtsi new file mode 100644 index 0000000000..9e88afd30e --- /dev/null +++ b/arch/arm/dts/meson-gxl-u-boot.dtsi @@ -0,0 +1,23 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2019 BayLibre, SAS. + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ + +#include "meson-gx-u-boot.dtsi" + +&usb0 { + dwc2: usb@c9100000 { + compatible = "snps,dwc2"; + reg = <0x0 0xc9100000 0x0 0x40000>; + interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clkc CLKID_USB1_DDR_BRIDGE>; + clock-names = "ddr"; + phys = <&usb3_phy>, <&usb2_phy1>; + dr_mode = "peripheral"; + g-rx-fifo-size = <192>; + g-np-tx-fifo-size = <128>; + g-tx-fifo-size = <128 128 16 16 16>; + status = "disabled"; + }; +}; diff --git a/arch/arm/include/asm/arch-meson/usb-gx.h b/arch/arm/include/asm/arch-meson/usb-gx.h new file mode 100644 index 0000000000..aeb8e0c673 --- /dev/null +++ b/arch/arm/include/asm/arch-meson/usb-gx.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright 2019 BayLibre SAS + * Author: Neil Armstrong <narmstrong@baylibre.com> + */ +#ifndef _ARCH_MESON_USB_GX_H_ +#define _ARCH_MESON_USB_GX_H_ + +#include <generic-phy.h> +#include <linux/usb/otg.h> + +/* TOFIX add set_mode to struct phy_ops */ +void phy_meson_gxl_usb2_set_mode(struct phy *phy, enum usb_dr_mode mode); +void phy_meson_gxl_usb3_set_mode(struct phy *phy, enum usb_dr_mode mode); + +#endif diff --git a/arch/arm/mach-meson/board-gx.c b/arch/arm/mach-meson/board-gx.c index 191fd49005..3da99017a5 100644 --- a/arch/arm/mach-meson/board-gx.c +++ b/arch/arm/mach-meson/board-gx.c @@ -14,6 +14,11 @@ #include <asm/io.h> #include <asm/armv8/mmu.h> #include <linux/sizes.h> +#include <usb.h> +#include <linux/usb/otg.h> +#include <asm/arch/usb-gx.h> +#include <usb/dwc2_udc.h> +#include <clk.h> #include <phy.h> DECLARE_GLOBAL_DATA_PTR; @@ -149,3 +154,116 @@ void meson_eth_init(phy_interface_t mode, unsigned int flags) /* Enable power gate */ clrbits_le32(GX_MEM_PD_REG_0, GX_MEM_PD_REG_0_ETH_MASK); } + +#if CONFIG_IS_ENABLED(USB_XHCI_DWC3_OF_SIMPLE) && \ + CONFIG_IS_ENABLED(USB_GADGET_DWC2_OTG) +static struct dwc2_plat_otg_data meson_gx_dwc2_data; +static struct phy usb_phys[2]; + +int board_usb_init(int index, enum usb_init_type init) +{ + struct ofnode_phandle_args args; + struct udevice *clk_dev; + ofnode dwc2_node; + struct clk clk; + int ret, i; + u32 val; + + /* find the dwc2 node */ + dwc2_node = ofnode_by_compatible(ofnode_null(), "snps,dwc2"); + if (!ofnode_valid(dwc2_node)) { + debug("Not found dwc2 node\n"); + return -ENODEV; + } + + if (!ofnode_is_available(dwc2_node)) { + debug("dwc2 is disabled in the device tree\n"); + return -ENODEV; + } + + /* get the PHYs */ + for (i = 0; i < 2; i++) { + ret = generic_phy_get_by_node(dwc2_node, i, &usb_phys[i]); + if (ret && ret != -ENOENT) { + pr_err("Failed to get USB PHY%d for %s\n", + i, ofnode_get_name(dwc2_node)); + return ret; + } + } + + for (i = 0; i < 2; i++) { + ret = generic_phy_init(&usb_phys[i]); + if (ret) { + pr_err("Can't init USB PHY%d for %s\n", + i, ofnode_get_name(dwc2_node)); + return ret; + } + } + + for (i = 0; i < 2; i++) { + ret = generic_phy_power_on(&usb_phys[i]); + if (ret) { + pr_err("Can't power USB PHY%d for %s\n", + i, ofnode_get_name(dwc2_node)); + return ret; + } + } + + phy_meson_gxl_usb3_set_mode(&usb_phys[0], USB_DR_MODE_PERIPHERAL); + phy_meson_gxl_usb2_set_mode(&usb_phys[1], USB_DR_MODE_PERIPHERAL); + + meson_gx_dwc2_data.regs_otg = ofnode_get_addr(dwc2_node); + if (meson_gx_dwc2_data.regs_otg == FDT_ADDR_T_NONE) { + debug("usbotg: can't get base address\n"); + return -ENODATA; + } + + /* Enable clock */ + ret = ofnode_parse_phandle_with_args(dwc2_node, "clocks", + "#clock-cells", 0, 0, &args); + if (ret) { + debug("usbotg has no clocks defined in the device tree\n"); + return ret; + } + + ret = uclass_get_device_by_ofnode(UCLASS_CLK, args.node, &clk_dev); + if (ret) + return ret; + + if (args.args_count != 1) { + debug("Can't find clock ID in the device tree\n"); + return -ENODATA; + } + + clk.dev = clk_dev; + clk.id = args.args[0]; + + ret = clk_enable(&clk); + if (ret) { + debug("Failed to enable usbotg clock\n"); + return ret; + } + + ofnode_read_u32(dwc2_node, "g-rx-fifo-size", &val); + meson_gx_dwc2_data.rx_fifo_sz = val; + ofnode_read_u32(dwc2_node, "g-np-tx-fifo-size", &val); + meson_gx_dwc2_data.np_tx_fifo_sz = val; + ofnode_read_u32(dwc2_node, "g-tx-fifo-size", &val); + meson_gx_dwc2_data.tx_fifo_sz = val; + + return dwc2_udc_probe(&meson_gx_dwc2_data); +} + +int board_usb_cleanup(int index, enum usb_init_type init) +{ + int i; + + phy_meson_gxl_usb3_set_mode(&usb_phys[0], USB_DR_MODE_HOST); + phy_meson_gxl_usb2_set_mode(&usb_phys[1], USB_DR_MODE_HOST); + + for (i = 0; i < 2; i++) + usb_phys[i].dev = NULL; + + return 0; +} +#endif |