diff options
author | yanhong.wang <yanhong.wang@starfivetech.com> | 2022-05-10 04:14:37 +0300 |
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committer | Yanhong Wang <yanhong.wang@linux.starfivetech.com> | 2022-10-18 11:24:35 +0300 |
commit | e81a6b4b7a58f56772b48db74ccadfc77a733fe1 (patch) | |
tree | 9bf608e56351ea62afb9e761e4c91acd536890d7 /arch/riscv/dts/starfive_evb.dts | |
parent | 987a20bf9b0d146127559e0414c5d9607d41f601 (diff) | |
download | u-boot-e81a6b4b7a58f56772b48db74ccadfc77a733fe1.tar.xz |
board:starfive: add starfive evb board support
Add board support for StarFive EVB.
Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
Diffstat (limited to 'arch/riscv/dts/starfive_evb.dts')
-rw-r--r-- | arch/riscv/dts/starfive_evb.dts | 104 |
1 files changed, 104 insertions, 0 deletions
diff --git a/arch/riscv/dts/starfive_evb.dts b/arch/riscv/dts/starfive_evb.dts new file mode 100644 index 0000000000..0a7c297fad --- /dev/null +++ b/arch/riscv/dts/starfive_evb.dts @@ -0,0 +1,104 @@ +// SPDX-License-Identifier: GPL-2.0 OR MIT +/* + * Copyright (C) 2022 StarFive Technology Co., Ltd. + */ + +/dts-v1/; + +#include "jh7110.dtsi" +/ { + #address-cells = <2>; + #size-cells = <2>; + model = "StarFive EVB"; + compatible = "starfive,jh7110"; + + aliases { + spi0="/soc/spi@13010000"; + gpio0="/soc/gpio@13040000"; + ethernet0="/soc/ethernet@16030000"; + mmc0="/soc/sdio0@16010000"; + mmc1="/soc/sdio1@16020000"; + }; + + chosen { + stdout-path = "/soc/serial@10000000:115200"; + }; + + + memory@80000000 { + device_type = "memory"; + reg = <0x0 0x40000000 0x1 0x0>; + }; + + soc { + }; +}; + +&cpu0 { + status = "okay"; +}; + +&clkgen { + clocks = <&osc>, <&gmac1_rmii_refin>, + <&stg_apb>, <&gmac0_rmii_refin>; + clock-names = "osc", "gmac1_rmii_refin", + "stg_apb", "gmac0_rmii_refin"; +}; + +&sdio0 { + clock-frequency = <4000000>; + max-frequency = <1000000>; + bus-width = <8>; + status = "okay"; +}; + +&sdio1 { + clock-frequency = <4000000>; + max-frequency = <1000000>; + bus-width = <4>; + status = "okay"; +}; + +&gmac0 { + phy-reset-gpios = <&gpio 13 0>; + status = "okay"; +}; + +&gpio { + compatible = "starfive,jh7110-gpio"; + gpio-controller; +}; + +&uart0 { + reg-offset = <0>; + current-speed = <115200>; + status = "okay"; +}; + +&gpioa { + status = "disabled"; +}; + +&usbdrd30 { + status = "okay"; +}; + +&usbdrd_cdns3 { + dr_mode = "host"; +}; + +&timer { + status = "disabled"; +}; + +&wdog { + status = "disabled"; +}; + +&clkvout { + status = "disabled"; +}; + +&pdm { + status = "disabled"; +}; |