diff options
| author | minda.chen <minda.chen@starfivetech.com> | 2022-11-01 11:00:20 +0300 |
|---|---|---|
| committer | mason.huo <mason.huo@starfivetech.com> | 2023-01-05 08:15:42 +0300 |
| commit | 946b2e1ad8b4e436091fd3957492be17618459c6 (patch) | |
| tree | f522142f5a3edb2c2d968907f31e726b3c085d57 /arch | |
| parent | 8a4e190ee227330d340324ea4c4277c702f2ae9b (diff) | |
| download | u-boot-946b2e1ad8b4e436091fd3957492be17618459c6.tar.xz | |
dts: add i2c5 and attach pmic configuration
i2c5 and pmic is used by opensbi power management
ops.
Signed-off-by: minda.chen <minda.chen@starfivetech.com>
Diffstat (limited to 'arch')
| -rw-r--r-- | arch/riscv/dts/jh7110.dtsi | 13 | ||||
| -rw-r--r-- | arch/riscv/dts/starfive_evb.dts | 7 |
2 files changed, 20 insertions, 0 deletions
diff --git a/arch/riscv/dts/jh7110.dtsi b/arch/riscv/dts/jh7110.dtsi index 0188f89780..50ea4786db 100644 --- a/arch/riscv/dts/jh7110.dtsi +++ b/arch/riscv/dts/jh7110.dtsi @@ -614,6 +614,19 @@ status = "disabled"; }; + i2c5: i2c5@12050000 { + compatible = "snps,designware-i2c"; + reg = <0x0 0x12050000 0x0 0x10000>; + clocks = <&clkgen JH7110_I2C5_CLK_CORE>, + <&clkgen JH7110_I2C5_CLK_APB>; + clock-names = "ref", "pclk"; + resets = <&rstgen RSTN_U5_DW_I2C_APB>; + interrupts = <50>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + }; + /* unremovable emmc as mmcblk0 */ sdio0: sdio0@16010000 { compatible = "snps,dw-mshc"; diff --git a/arch/riscv/dts/starfive_evb.dts b/arch/riscv/dts/starfive_evb.dts index 1a7b48e684..d3663b6973 100644 --- a/arch/riscv/dts/starfive_evb.dts +++ b/arch/riscv/dts/starfive_evb.dts @@ -171,3 +171,10 @@ &pdm { status = "disabled"; }; + +&i2c5 { + pmic_axp15060: axp15060_reg@36 { + compatible = "stf,axp15060-regulator"; + reg = <0x36>; + }; +}; |